Technical product specification

Intel
®
Server Board S2600CP and Server System P4000CP TPS Inte
Server Board S2600CP Functional Architecture
Revision 1.8
Intel order number G26942-005
39
Note: PCIe slot 5 is functional only when the second processor is installed.
4.2.3.1.2 DMI2 Interface to the Intel® C602 chipset
The platform requires an interface to Intel
®
C602 chipset which provides basic, legacy functions
required for the server platform and operating systems. Since only one Intel
®
C602 chipset is
required and allowed for the system, any sockets which do not connect to Intel
®
C602 chipset
would use this port as a standard x4 PCI Express* 2.0 interface.
4.2.3.1.3 Integrated IOAPIC
Provides support for PCI Express* devices implementing legacy interrupt messages without
interrupt sharing.
4.2.3.1.4 Intel
®
QuickData Technology
Used for efficient, high bandwidth data movement between two locations in memory or from
memory to I/O.
4.2.3.1.5 Non-Transparent Bridge
PCI Express* Non-Transparent Bridge (NTB) acts as a gateway that enables high performance,
low overhead communication between two intelligent subsystems; the local and the remote
subsystems. The NTB allows a local processor to independently configure and control the local
subsystem, provides isolation of the local host memory domain from the remote host memory
domain while enabling status and data exchange between the two domains.
4.3 Intel® C602 Chipset Functional Overview
The following sub-sections will provide an overview of the key features and functions of the
Intel
®
C602 chipset used on the server board.
Figure 23. Intel
®
Server Board S2600CP2/S2600CP4 Chipset Functional Block Diagram