Technical product specification
Intel
®
Server Board S2600CP and Server System P4000CP TPS Intel®
Server Board S2600CP Functional Architecture
Revision 1.8
Intel order number G26942-005
43
4.3.12 Gigabit Ethernet Controller
The Gigabit Ethernet Controller provides a system interface using a PCI function. The controller
provides a full memory-mapped or IO mapped interface along with a 64 bit address master
support for systems using more than 4 GB of physical memory and DMA (Direct Memory
Addressing) mechanisms for high performance data transfers. Its bus master capabilities enable
the component to process high-level commands and perform multiple operations; this lowers
processor utilization by off-loading communication tasks from the processor. Two large
configurable transmit and receive FIFOs (up to 20 KB each) help prevent data underruns and
overruns while waiting for bus accesses. This enables the integrated LAN controller to transmit
data with minimum inter-frame spacing (IFS).
The LAN controller can operate at multiple speeds (10/100/1000 MB/s) and in either full duplex
or half duplex mode. In full duplex mode the LAN controller adheres with the IEEE 802.3x Flow
Control Specification. Half duplex performance is enhanced by a proprietary collision reduction
mechanism.
4.3.13 RTC
The Intel
®
C602 chipset contains a real-time clock with 256 bytes of battery-backed RAM. The
real-time clock performs two key functions: keeping track of the time of day and storing system
data. The RTC operates on a 32.768 KHz crystal and a 3 V battery.
4.3.14 GPIO
Various general purpose inputs and outputs are provided for custom system design. The
number of inputs and outputs varies depending on the Intel
®
C602 chipset configuration.
4.3.15 Enhanced Power Management
The Intel
®
C602 chipset’s power management functions include enhanced clock control and
various low-power (suspend) states. A hardware-based thermal management circuit permits
software-independent entrance to low-power states. The Intel
®
C602 chipset contains full
support for the Advanced Configuration and Power Interface (ACPI) Specification, Revision
4.0a.
4.3.16 Manageability
The Intel
®
C602 chipset integrates several functions designed to manage the system and lower
the total cost of ownership (TCO) of the system. These system management functions are
designed to report errors, diagnose the system, and recover from system lockups without the
aid of an external microcontroller.
4.3.17 System Management Bus (SMBus* 2.0)
The Intel
®
C602 chipset contains a SMBus* Host interface that allows the processor to
communicate with SMBus* slaves. This interface is compatible with most I
2
C devices. Special
I
2
C commands are implemented.
The Intel
®
C602 chipset’s SMBus* host controller provides a mechanism for the processor to
initiate communications with SMBus* peripherals (slaves). Also, the Intel
®
C602 chipset
supports slave functionality, including the Host Notify protocol. Hence, the host controller
supports eight command protocols of the SMBus* interface (see System Management Bus