SEL Troubleshooting Guide

PCI Express* and Legacy PCI Subsystem System Event Log Troubleshooting Guide for Intel® S5500/S3420 Series Server Boards
60 Intel order number G74211-002 Revision 1.1
Table 65: PCI Express* Fatal Error Sensor Typical Characteristics
Byte
Field
Description
8
9
Generator ID
0033h = BIOS SMI Handler
11
Sensor Type
13h = Critical Interrupt
12
Sensor Number
04h
13
Event Direction and
Event Type
[7] Event direction
0b = Assertion Event
1b = Deassertion Event
[6:0] Event Type = 70h (OEM Specific)
14
Event Data 1
[7:6] – 10b = OEM code in Event Data 2
[5:4] – 10b = OEM code in Event Data 3
[3:0] – Event Trigger Offset as described in Table 66
15
Event Data 2
PCI Bus number
16
Event Data 3
[7:3] – PCI Device number
[2:0] – PCI Function number
Table 66: PCI Express* Fatal Error Sensor Event Trigger Offset – Next Steps
Event Trigger Offset
Description
Next Steps
Hex
Description
00h
Data Link Layer Protocol Error
Indicates a CRC error detected during a DLLP transaction. This
means the transaction was corrupted.
1. Decode bus, device, and function to identify
the card.
2. If this is an add-in card:
a. Verify the card is inserted properly.
b. Install the card in another slot and check
whether the error follows the card or
stays with the slot.
c. Update all firmware and drivers,
including non-Intel components.
01h
Surprise Link Down
The link was lost and is no longer functional. Requires a reboot to
bring the link back.
02h
Unexpected Completion
Indicates the device received a completion notification for a
transaction it does not recognize. This is a fatal error.
03h
Received Unsupported request condition on
inbound address decode with the exception
of SAD
Typically indicates a failure due to an incorrect address sent to the
target. This unknown address is a fatal error.