Technical Product Specification

Intel® Server System SC5650HCBRP TPS Functional Architecture
Revision 1.2
Intel order number E81443-002
23
3.1 Intel
®
5520 I/O Hub (IOH)
The Intel
®
5520 I/O Hub (IOH) in the Intel
®
Server System SC5650HCBRP provides a
connection point between various I/O components and Intel
®
QPI-based processors, which
includes the following core platform functions:
– Intel
®
QPI link interface for the processor subsystem
– PCI Express* Ports
– Enterprise South Bridge Interface (ESI) for connecting Intel
®
ICH10R
– Manageability Engine (ME)
– Controller Link (CL)
– SMBus Interface
– Intel
®
Virtualization Technology for Directed I/O (Intel
®
VT-d)
The following table shows the high-level features of the Intel
®
5520 IOH:
Table 1. IOH High-Level Summary
IOH SKU Intel® QPI Ports Supported Processor PCI Express*
Lanes
Manageability
5520 2 Intel
®
Xeon
®
Processor 5500 Series 36 Intel
®
Intelligent Power Node
Manager
3.1.1 Intel
®
QuickPath Interconnect
The Intel
®
Server System SC5650HCBRP provides two full-width, cache-coherent, link-based
Intel
®
QuickPath Interconnect interfaces from Intel
®
5520 IOH for connecting Intel
®
QPI based
processors. The two Intel
®
QPI link interfaces support full-width communication only and have
the following main features:
z Packetized protocol with 18 data/protocol bits and 2 CRC bits per link per direction
 Supporting 4.8 GT/s, 5.86 GT/s, and 6.4 GT/s
z Fully-coherent write cache with inbound write combining
z Read Current command support
z Support for 64-byte cache line size
3.1.2 PCI Express* Ports
The Intel
®
5520 IOH is capable of interfacing with up to 36 PCI Express* Gen2 lanes, which
support devices with the following link width: x16, x8, x4, x2, and x1.
All ports support PCI Express* Gen1 and Gen2 transfer rates.
For a detailed PCI Express* Slots definition in the Intel
®
Server System SC5650HCBRP, see
“3.5 PCI Subsystem.”