Technical Product Specification

Power Sub-system Intel® Server System SC5650HCBRP TPS
Revision 1.2
Intel order number E81443-002
68
Table 28. Turn On / Off Timing
Item Description Minimum Maximum Units
Tsb_on_delay Delay from AC being applied to 5 VSB being within regulation. 1500 ms
Tac_on_delay Delay from AC being applied to all output voltages being
within regulation.
2500
ms
Tvout_holdup Time all output voltages stay within regulation after loss of
AC.
21
ms
Tpwok_holdup Delay from loss of AC to de-assertion of PWOK 20 ms
Tpson_on_dela
y
Delay from PSON# active to output voltages within
regulation limits.
5 400
ms
Tpson_pwok Delay from PSON# deactive to PWOK being de-asserted. 50 ms
Tpwok_on Delay from output voltages within regulation limits to PWOK
asserted at turn on.
100 1000
ms
Tpwok_off Delay from PWOK de-asserted to 12-V output voltage
dropping out of regulation limits.
1
ms
Tpwok_low Duration of PWOK being in the de-asserted state during an
off/on cycle using AC or the PSON signal.
100
ms
Tsb_vout Delay from 5 VSB being in regulation to O/Ps being in
regulation at AC turn on.
50 1000
ms
T5VSB_holdup Time the 5 VSB output voltage stays within regulation after
loss of AC.
70
ms
Note:
1 T
vout_holdup
and T
pwok_holdup
are defined under 75% loading.