Technical Product Specification

Intel® Server System SC5650HCBRP TPS Power Sub-system

Revision 1.2

Intel order number E81443-002

4.1.5.3 PWOK (Power OK) Output Signal

PWOK is a power OK signal and is pulled HIGH by the power supply to indicate that all the

outputs are within the regulation limits of the power supply. When any output voltage falls below

regulation limits or when AC power has been removed for a time sufficiently long so the power

supply operation is no longer guaranteed, PWOK will be de-asserted to a LOW state. The start

of the PWOK delay time is inhibited as long as any power supply output is in current limit.

Table 33. PWOK Signal Characteristics

Signal Type

Open collector/drain output from power supply. Pull-up to

VSB located in system.

PWOK = High Power OK

PWOK = Low Power Not OK

MIN MAX

Logic level low voltage, Isink=4mA 0 V 0.4 V

Logic level high voltage, Isource=200μA 2.4 V 5.25 V

Sink current, PWOK = low 4 mA

Source current, PWOK = high 2 mA

PWOK delay: Tpwok_on 100 ms 1000 ms

PWOK rise and fall time 100 μs

Power down delay: T pwok_off 1 ms 200 ms

4.1.5.4 LEDs

There is a bi-color LED and a single color LED to indicate power supply status. The LED

operation is defined in the following table.