Report

Intel® Server System SR2500ALLXR 4BErrata and Contingencies
Applicable error message
(Type N/A if the error message
or failing text is excessive or if
there is no text)
Header Type 1 Registers failure due to a PCI Compliance test issue
RESOLUTION: The following assertion failure is allowed
60BDF3F8-01D2-4B58-8A14-04DA4C1B694A
Additional information
(for example, test system in a
multiple system configuration)
Operating system
(Windows XP, Windows 2000, etc.)
Failure type
(Contingency, Errata, Incident)
ID number
Windows Server 2008 x64 Errata 1115
Failing test name
PCI Hardware Compliance Test
Applicable error message
(Type N/A if the error message
or failing text is excessive or if
there is no text)
PCI Compliance - Bit 3 (Read Completion Boundary) in the Link
Control register (offset 10h) in the PCI Express Capability table
must be read-only and always return 0 for switch ports.
RESOLUTION: The following PCI Compliance assertion failure is
allowed 9A275B03-1072-43D6-B034-3DD306D24324
Additional information
(for example, test system in a
multiple system configuration)
Operating system
(Windows XP, Windows 2000, etc.)
Failure type
(Contingency, Errata, Incident)
ID number
Windows Server 2008 x64 Errata 331
Failing test name
PCI Hardware Compliance Test
Applicable error message
(Type N/A if the error message
or failing text is excessive or if
there is no text)
PCI Compliance - Bit range 31:2 (Message Address)in the Message
Address register (offset 4h) in the MSI Capability table must be
read-writable. RESOLUTION: The following PCI Compliance test
assertion failure is allowed DDC8A893-6F85-4D69-BC79-
874BA52E0A02.
Additional information
(for example, test system in a
multiple system configuration)
Operating system
(Windows XP, Windows 2000, etc.)
Failure type
(Contingency, Errata, Incident)
ID number
Windows Server 2008 x64 Errata 324
Failing test name
PCI Hardware Compliance Test
Applicable error message
(Type N/A if the error message
or failing text is excessive or if
there is no text)
PCI Compliance - Bit 20 (Data Link Layer Link Active Reporting
Capable) in the Link Capabilities register (offset Ch) in the PCI
Express Capability table must be read-only. .
May 19, 2008 17