Service Guide
Server System Features
16 Intel
®
Server System SC5650HCBRP Service Guide
Callout DIMM Socket Callout DIMM Socket
D. Channel B, DIMM_B1 (Blue) J. Channel E, DIMM_E1 (Blue)
E. Channel C, DIMM_C2 K. Channel F, DIMM_F2
F. Channel C, DIMM_C1 (Blue) L. Channel F, DIMM_F1 (Blue)
Figure 13. DIMM Sockets
DDR3 DIMMs must meet the following requirements:
Use only 240-pin DDR3 DIMMs.
A minimum of one 1 GB DDR3 DIMM is required in DIMM socket DIMM_A1.
Either registered DDR3 DIMMs (RDIMMs) or ECC unbuffered DDR3 DIMMs (UDIMMs). No mixing of
RDIMMs and UDIMMs.
Mixing memory type, size, speed, and/or rank on this platform has not been validated and is not
supported
Mixing memory vendors is not supported on this platform by Intel
Non-ECC memory is not supported and has not been validated in a server environment
DDR3-800, DDR3-1066, or DDR3-1333
DIMM within a channel must be populated starting with the first slot (blue slot) of the channel: DIMM_A1,
DIMM_B1, DIMM_C1, DIMM_D1, DIMM_E1, or DIMM_F1.
When installing Quad-rank DIMM, you must populate Quad-rank DIMM starting with the first slot (blue
slot) of each channel.
For a complete list of supported memory DIMMs, see the links under “Additional Information and Software”.
Channel Population Requirements for Memory RAS Modes
The Intel
®
Server System SC5650HCBRP supports two memory RAS modes: Independent Channel Mode,
and Mirrored Channel Mode. The rules on channel population and channel matching vary by the RAS mode
used. Note that the support of RAS modes that require matching DIMM population between channels
(Mirroring) and require that ECC DIMMs must be populated.
Independent Channel Mode
You can populate channels in any order in Independent Channel Mode. You can populate all three channels in
any order and have no matching requirements. All channels must run at the same interface frequency, but
individual channels may run at different DIMM timings (RAS latency, CAS latency, and so on).
Mirrored Channel Mode
In Mirrored Channel Mode, the memory contents are mirrored between Channels A (D) and Channel B (E). As
a result of the mirroring, the total physical memory available to the system is half of what is populated. Mirrored
Channel Mode requires that Channel A (D) and Channel B (E) must be populated identically. DIMM slot
populations within a channel do not have to be identical but the same DIMM slot location across Channel A (D)
and Channel B (E) must be populated the same. Channel C (F) is unused in Mirrored Channel Mode.