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Intel® Server System SR1640TH

Technical Product Specification

Intel order number: E94847-001

Revision 1.0

March 2010

Enterprise Platforms and Services Marketing

Summary of content (122 pages)

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Intel® Server System SR1640TH Technical Product Specification Intel order number: E94847-001 Revision 1.
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Revision History Intel® Server System SR1640TH TPS Revision History Date March 26, 2010 Revision Number 1.0 Modifications Initial release. ii Revision 1.
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Intel® Server System SR1640TH TPS Disclaimers Disclaimers Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppels or otherwise, to any intellectual property rights is granted by this document.
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Table of Contents Intel® Server System SR1640TH TPS Table of Contents 1. Introduction .......................................................................................................................... 1 1.1 Chapter Outline........................................................................................................ 1 1.2 Server Board Use Disclaimer .................................................................................. 1 2. Functional Architecture ............................
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Intel® Server System SR1640TH TPS Table of Contents 3.4.5 Susceptibility Requirements .................................................................................. 63 3.4.6 AC Line Fast Transient (EFT) Specification .......................................................... 64 3.4.7 AC Line Dropout / Holdup...................................................................................... 64 3.4.8 AC Line Leakage Current .............................................................................
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Table of Contents Intel® Server System SR1640TH TPS 6.1 Control Panel Button.............................................................................................. 77 6.2 Control Panel LED Indicators ................................................................................ 77 6.2.1 Power / Sleep LED ................................................................................................ 78 6.2.2 System Status LED........................................................................
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Intel® Server System SR1640TH TPS List of Figures List of Figures Figure 1. System Overview........................................................................................................... 4 Figure 2. Single tray overview (Left Tray) ..................................................................................... 4 Figure 3. System trays overview with power supply units............................................................. 5 Figure 4. System tray Components ..........................
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List of Figures Intel® Server System SR1640TH TPS Figure 46. Jumper location on Server Board S3420TH .............................................................. 81 Figure 47. Diagnostic LED Placement Diagram ......................................................................... 99 viii Revision 1.
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Intel® Server System SR1640TH TPS List of Tables List of Tables Table 1. System Feature Set ........................................................................................................ 2 Table 2. Chassis Dimensions ....................................................................................................... 5 Table 3. Standard Platform DIMM Nomenclature ....................................................................... 12 Table 4. Memory Configuration Table......................
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List of Tables Intel® Server System SR1640TH TPS Table 46. CMOS Clear (J1G2, J9J1) .......................................................................................... 58 Table 47. BIOS Recovery (J1G3, J9H3)..................................................................................... 58 Table 48. BMC Force Update (J1A1, J5A1) ............................................................................... 58 Table 49. Port 80/81 Display Interface on LPC Bus ...................................
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Intel® Server System SR1640TH TPS List of Tables < This page intentionally left blank > xi Revision 1.
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Intel® Server System SR1640TH TPS 1. Introduction Introduction This Technical Product Specification (TPS) provides system specific information detailing the features, functionality, and high-level architecture of the Intel® Server System SR1640TH including the server board S3420TH inside system. In addition, you can obtain design-level information for specific sub-systems by ordering the External Product Specifications (EPS) or External Design Specifications (EDS) for a given sub-system.
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Functional Architecture 2. Intel® Server System SR1640TH TPS Functional Architecture The Intel® Server System SR1640TH is a rack mount 1U server system, purpose-built for high-density and lowest total cost of ownership in dense computing and hosting/IPDC applications. The system is integrated with two dedicated Intel® Server Boards S3420TH, each board contains 2 computing nodes. The two server boards in Intel® Server System SR1640TH are installed in two system trays each. There are totally four 3.
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Intel® Server System SR1640TH TPS Functional Architecture Feature Description Three 8-pin system FAN headers per board One power supply connector with PMBus enabled, shared by two nodes System Fan Support Three sets of axial FAN per board Total six sets of system FANs in chassis Add-in Adapter Support No support for add-in card On-board Video On-board Server Engines* Pilot II Controller ServerEngine iBMC External 64MB DDR2 667MHz Memory LAN Support Two 10/100/1000 ports provided by Intel® 82574L
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Functional Architecture 2.1 Intel® Server System SR1640TH TPS System Views There are 2 trays in SR1640TH system chassis. Each tray contains one computing board with system FANs and control panel. Figure 1. System Overview Figure 2. Single tray overview (Left Tray) 4 Revision 1.
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Intel® Server System SR1640TH TPS Functional Architecture Figure 3. System trays overview with power supply units 2.2 System Dimensions Table 2. Chassis Dimensions Height 44 mm 1.73 inches Width without rails 440 mm 17.32 inches Width with rails 456.6 mm 17.97 inches Depth without CMA Weight Chassis – basic configured (0 drives) Chassis – fully configured (4 drives) 690 mm 26.77 inches 14.6 kg 17.8 kg 32.19 lbs 39.25 lbs 5 Revision 1.
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Functional Architecture 2.3 Intel® Server System SR1640TH TPS System Components A B C D E Fixed 3.5 inch HDD bays Air duct Front control pane Power supply unit System Fans Module F G Dual-node server board S3420TH RMM3 Lite-V module (optional) Figure 4. System tray Components 6 Revision 1.
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Intel® Server System SR1640TH TPS 2.4 Functional Architecture Server Board Overview ® Intel Server System SR1640TH supports two dual-node server board S3420TH in chassis. The following sections provide an overview of the server board feature sets. Figure 5. Single server board S3420TH view 2.4.1 Server board architecture The server board included in Intel® Server System SR1640TH is a compact-optimized dualnode entry server board.
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Functional Architecture Intel® Server System SR1640TH TPS Figure 6. Server board S3420TH block diagram By high density design philosophy, there are two computing nodes on one server board S3420TH. These two nodes are identical in logic, but they are separated on design without any link between them, including any power rail. Two nodes share one PSU and three system fans. 2.4.
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Intel® Server System SR1640TH TPS Functional Architecture Intel® Core™ i3 Processor 2.4.2.2 The Intel® Core™ i3 Series processors highly integrated solution variant is composed of two processor cores. FC-LGA 1156 socket package with 2.5 GT/s. Up to 95 W Thermal Design Power (TDP); processors with higher TDP are not supported. Please get the detail supported processor list from Intel website. Intel® Turbo Boost Technology 2.4.2.
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Functional Architecture Intel® Server System SR1640TH TPS memory. Each DDR3 channel in the IMC supports up to two DDR3 RDIMM/UDIMM slots. The DDR3 RDIMM frequency can be 800/1066/1333 MHz. DDR3 UDIMM frequency can be 1066/1333 MHz. All RDIMMs and UDIMMs include ECC (Error Correction Code) operation. Various speeds and memory technologies are supported.
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Intel® Server System SR1640TH TPS z z z z Functional Architecture 0xEB - Memory Test Error: If a DDR3 DIMM or a set of DDR3 DIMMs on the same memory channel (row) fails HW Memory BIST but usable memory remains available, the BIOS emits a beep code and displays POST Diagnostic LED code 0xEB momentarily during the beeping and then continues POST.
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Functional Architecture Intel® Server System SR1640TH TPS feature offered by the Intel® S3420 I/O Hub and a variably-sized Memory Mapped I/O region for the PCI Express* functions. 2.4.3.3.2 High-Memory Reclaim When 4 GB or more of physical memory is installed (physical memory is the memory installed as DDR3 DIMMs), the reserved memory is lost.
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Intel® Server System SR1640TH TPS Functional Architecture 5. The DIMM identifiers on the silkscreen on the board provide information about the channel and the processor socket to which they belong. For example, DIMM_A1 is the first slot on channel A. 2.4.3.4.
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Functional Architecture Intel® Server System SR1640TH TPS This table defines half of the valid memory configurations. You can exchange Channel A DIMMs with the DIMMs on Channel B to get another half. 2.4.3.4.5 UDIMM Configuration rules Table 5.
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Intel® Server System SR1640TH TPS Functional Architecture To get the maximum memory size on RDIMM, you get the detail information from the following table. Table 8.
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Functional Architecture 2.4.5.2 Intel® Server System SR1640TH TPS Serial ATA Support ® The Intel 3420 Chipset has two integrated SATA host controllers that support independent DMA operation on up to six ports and supports data transfer rates of up to 3.0 GB/s (300 MB/s). The SATA controller contains two modes of operation – a legacy mode using I/O space and an AHCI mode using memory space. Software that uses legacy mode does not have AHCI capabilities.
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Intel® Server System SR1640TH TPS 2.4.6 Functional Architecture Integrated Baseboard Management Controller The server boards S3420TH in Intel® Server System SR1640TH have the integrated baseboard management controller. The ServerEngines* LLC Pilot II Integrated BMC is provided by an embedded ARM9 controller and associated peripheral functionality that is required for IPMI-based server management. Firmware usage of these hardware features is platform-dependant.
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Functional Architecture Intel® Server System SR1640TH TPS Integrated BMC Block Diagram Interrupt Controller Fan Tach (12) PWM (4) ADC Thermal USB to Host Code Memory USB 1.1 & USB 2.
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Intel® Server System SR1640TH TPS Functional Architecture Table 9. Optional RMM3 Advanced Management Board Features Feature Description KVM Redirection USB Media Redirection WS-MAN 2.4.6.3 Remote console access via keyboard, video, and mouse redirection over LAN. Remote USB media access over LAN. Full SMASH profiles for WS-MAN based consoles. Serial Ports The server board S3420TH does not support serial port. 2.4.6.
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Functional Architecture 2.4.8 Intel® Server System SR1640TH TPS Network Interface Controller (NIC) The server boards S3420TH in Intel® Server System SR1640TH support three network interfaces, two is provided from the onboard Intel® 82574L GbE PCI Express* network controllers; the third one is the onboard 10/100Mbps KSZ8041NL Network controller, only enabled by RMM3 Lite-V module for management. 2.4.8.
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Intel® Server System SR1640TH TPS 2.5 Functional Architecture Platform Management The platform management subsystem is based on the Integrated BMC features of the ServerEngines* Pilot II. The onboard platform management subsystem consists of communication buses, sensors, system BIOS, and server management firmware. The following diagram provides an overview of the Server Management Bus (SMBUS) architecture used on this server board. 2.5.1 Feature Support 2.5.1.1 IPMI 2.
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Functional Architecture Intel® Server System SR1640TH TPS The Integrated Baseboard Management Controller (Integrated BMC) generates diagnostic beep codes for fault conditions. System GUID storage and retrieval. Front panel management: The Integrated Baseboard Management Controller (Integrated BMC) controls the system status LED and chassis ID LED. It supports secure lockout of certain front panel functionality and monitors button presses.
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Intel® Server System SR1640TH TPS 2.5.2.2.2 Functional Architecture Video Video output from the KVM subsystem is equivalent to the video output on the local console. Video redirection is available after video is initialized by the system BIOS. The KVM video resolution and refresh rates will always match the values set in the operating system. 2.5.2.2.3 Availability The default inactivity timeout is 30 minutes; however, this can be changed through the embedded web server.
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Functional Architecture 2.5.2.5 Intel® Server System SR1640TH TPS Local Directory Authentication Protocol (LDAP) The Integrated BMC firmware supports the Local Directory Authentication Protocol (LDAP) protocol for user authentication. Note: IPMI users/passwords and sessions are not supported over LDAP. 2.5.2.6 Embedded Webserver The Integrated BMC provides an embedded web server for out-of-band management. User authentication is handled by IPMI user names and passwords.
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Intel® Server System SR1640TH TPS Functional Architecture Error Manager No. 005 004 003 002 001 Event Info M-BIT MEM ECC Error CPU0 Ch 0 Dimm0 S-BIT MEM ECC Error CPU0 Ch 0 Dimm0 PCIE UNCOR ERR Bus0 Dev 1C Fun0 MEM Parity Error CPU0 Ch 0 Dimm0 Thermal Trip Occurred. Time 10/15/09 15:12:23 10/15/09 15:11:25 10/15/09 15:08:36 10/15/09 15:07:11 10/15/09 15:05:05 Figure 8. Example of Event Log Viewer The Event log viewer is at another page than the BIOS error manager.
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Functional Architecture 2.6.3 Intel® Server System SR1640TH TPS BIOS Setup utility The BIOS setup utility is a text-based utility that allows the user to configure the system and view current settings and environment information for the platform devices. The Setup utility controls the platform’s built-in devices, boot manager, and error manager. The BIOS setup interface consists of a number of pages or screens. Each page contains information or links to other pages.
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Intel® Server System SR1640TH TPS Functional Architecture Each Setup menu page contains a number of features. Each feature is associated with a value field except those used for informative purposes. Each value field contains configurable parameters. Depending on the security option chosen and, in effect, by the password, a menu feature’s value may or may not be changed. If a value cannot be changed, its field is made inaccessible and appears grayed out. Table 12.
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Functional Architecture Intel® Server System SR1640TH TPS can select the menus listed here. Some menus are hidden and become available by scrolling off the left or right of the current selections. 2.6.5 Server Platform Setup Utility Screens The following sections describe the screens available for the configuration of a server platform. In these sections, tables are used to describe the contents of each screen.
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Intel® Server System SR1640TH TPS Functional Architecture Table 13. Setup Utility – Main Screen Fields Setup Item Logged in as Options Help Text Platform ID System BIOS Version Information only. Displays the current BIOS version. xx = major version yy = minor version zzzz = build number Information only. Displays the current BIOS build date. Build Date Memory Size Quiet Boot Comments Information only. Displays password level that setup is running in: Administrator or User.
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Functional Architecture Main Intel® Server System SR1640TH TPS Advanced Security Server Management Boot Options Boot Manager ► Processor Configuration ► Memory Configuration ► Mass Storage Controller Configuration ► Serial Port Configuration ► USB Configuration ► PCI Configuration ► System Acoustic and Performance Configuration Figure 10. Setup Utility – Advanced Screen Display Table 14.
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Intel® Server System SR1640TH TPS Functional Architecture Advanced Processor Configuration Processor Socket Processor ID Processor Frequency Microcode Revision L1 Cache RAM L2 Cache RAM L3 Cache RAM CPU 1 Size of Cache Size of Cache Size of Cache Processor 1 Version Current QPI Link Speed QPI Link Frequency Intel® Turbo Boost Technology
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Functional Architecture Setup Item Processor Version Intel® Server System SR1640TH TPS Options Help Text Information only. Current speed that the QPI Link is using. Information only. Current frequency that the QPI Link is using.
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Intel® Server System SR1640TH TPS 2.6.5.2.2 Functional Architecture Memory Screen The Memory screen allows the user to view details about the system memory DDR3 DIMMs installed. This screen also allows the user to open the Configure Memory RAS and Performance screen. To access this screen from the Main screen, select Advanced > Memory.
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Functional Architecture Intel® Server System SR1640TH TPS Setup Item DIMM_ XY 2.6.5.2.3 Comments Displays the state of each DIMM socket present on the board. Each DIMM socket field reflects one of the following possible states: Installed: There is a DDR3 DIMM installed in this slot. Not Installed: There is no DDR3 DIMM installed in this slot. Disabled: The DDR3 DIMM installed in this slot was disabled by the BIOS to optimize memory configuration.
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Intel® Server System SR1640TH TPS Setup Item SATA Port 0 Options < Not Installed / Drive information> < Not Installed / Drive information> < Not Installed / Drive information> < Not Installed / Drive information> SATA Port 1 SATA Port 4 SATA Port 5 2.6.5.2.4 Functional Architecture Help Text Comments Information only. This field is unavailable when RAID Mode is enabled. Information only. This field is unavailable when RAID Mode is enabled. Information only.
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Functional Architecture Setup Item Legacy USB Support Options Enabled Disabled Auto Port 60/64 Emulation Enabled Disabled Make USB Devices NonBootable Enabled Disabled Device Reset timeout 10 sec 20 sec 30 sec 40 sec Auto Floppy Forced FDD Hard Disk CD-ROM One line for each mass storage device in system 2.6.5.2.5 Intel® Server System SR1640TH TPS Help Text USB device boot support and PS/2 emulation for USB keyboard and USB mouse devices.
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Intel® Server System SR1640TH TPS Functional Architecture Table 19. Setup Utility – PCI Configuration Screen Fields Setup Item Maximize Memory below 4GB Options Enabled Disabled Help Text If enabled. the BIOS maximizes usage of memory below 4 GB for OS without PAE by limiting PCIE Extended Configuration Space to 64 buses. Memory Mapped I/O above 4GB Enabled Disabled Enable or disable memory mapped I/O of 64-bit PCI devices to 4 GB or greater address space.
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Functional Architecture Intel® Server System SR1640TH TPS Table 20. Setup Utility – System Acoustic and Performance Configuration Screen Fields Setup Item Set Throttling Mode Options Help Text [Auto] – Auto Throttling mode. [CLTT] – Closed Loop Thermal Throttling Mode. [OLTT] – Open Loop Thermal Throttling Mode. Auto CLTT OLTT Altitude 300m or less 301m-900m 901m-1500m Higher than 1500m Set Fan Profile Performance Acoustics 2.6.5.
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Intel® Server System SR1640TH TPS Functional Architecture Table 21. Setup Utility – Security Configuration Screen Fields Setup Item Administrator Password Status Options User Password Status Set Administrator Password [123aBcD] Set User Password [123aBcD] Front Panel Lockout Enabled Disabled 2.6.5.4 Help Text Comments Information only. Indicates the status of the administrator password. Information only.
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Functional Architecture Main Advanced Intel® Server System SR1640TH TPS Security Server Management Boot Options Boot Manager Assert NMI on SERR Enabled / Disabled Assert NMI on PERR Enabled / Disabled Resume on AC Power Loss Stay Off / Last state / Reset Clear System Event Log Enabled / Disabled FRB-2 Enable Enabled / Disabled O/S Boot Watchdog Timer Enabled / Disabled O/S Boot Watchdog Timer Policy Power off / Reset O/S Boot Watchdog Timer Timeout 5 minutes / 10 minutes / 15 minutes
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Intel® Server System SR1640TH TPS Setup Item Plug & Play BMC Detection System Information Help Text If enabled, the BMC is detectable by OSs that support plug and play loading of an IPMI driver. Do not enable if your OS does not support this driver. View system information BMC Configuration View/Configure BMC LAN channel and User settings 2.6.5.5 Options Enabled Disabled Functional Architecture Comments Takes the user to the System Information screen. Takes the user to the BMC configuration screen.
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Functional Architecture Setup Item Asset Tag Intel® Server System SR1640TH TPS Options Help Text Press to edit system Serial Number and then use Backspace to delete existing value. Maximum length is 20 characters Comments Information only. BMC Firmware Revision Information only HSC Firmware Revision Information only. If there is no HSC installed, the Firmware Revision Number appears as “0,00”. ME Firmware Revision Information only. SDR Revision Information only UUID Information only 2.
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Intel® Server System SR1640TH TPS Functional Architecture Figure 20. Setup Utility – BMC configuration Screen Display Server Management BMC Configuration Baseboard channel configuration IP Source IP Address Subnet Mask Gateway IP Static/ Dynamic Intel ® RMM3 channel configuration IP Source IP Address Subnet Mask Gateway IP Static/ Dynamic BMC Host Name Intel ® RMM3 User Configuration User ID User status Network Privilege User Name User Password.
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Functional Architecture Intel® Server System SR1640TH TPS Setup Item Options Help Text name must begin with an alphabetic character. User Password Press Key to enter password. Only alphanumeric characters can be used. Maximum length is 15 characters and case sensitive. **Note: Password entered will override any previously set password. 2.6.5.7 Comments This filed will not indicate whether there is password set already.
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Intel® Server System SR1640TH TPS Setup Item Options devices. Hard Disk Order Functional Architecture Help Text boot option for this position. Set the order of the legacy devices in this group. CDROM Order Set the order of the legacy devices in this group. Floppy Order Set the order of the legacy devices in this group. Network Device Order Set the order of the legacy devices in this group. BEV Device Order Set the order of the legacy devices in this group.
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Functional Architecture Intel® Server System SR1640TH TPS Table 26. Setup Utility – Add New Boot Options Screen Fields Setup Item Add boot option label Select Filesystem Options Help Text Create the label for the new boot option. Select one from list provided. Select one filesystem from the list. Path for boot option Enter the path to boot option in the format: \path\filename.efi Save Save the boot option. 2.6.5.7.
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Intel® Server System SR1640TH TPS Setup Item Hard Disk #2 2.6.5.7.4 Functional Architecture Options Available Legacy devices for this Device group. Help Text Set system boot order by selecting the boot option for this position. CDROM Order Screen The CDROM Order screen allows the user to control the CDROM devices. To access this screen from the Main screen, select Boot Options > CDROM Order. Boot Options CDROM #1 CDROM #2 Figure 25.
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Functional Architecture Intel® Server System SR1640TH TPS Setup Item Floppy Disk #2 2.6.5.7.6 Options Available Legacy devices for this Device group. Help Text Set system boot order by selecting the boot option for this position. Network Device Order Screen The Network Device Order screen allows the user to control the network bootable devices. To access this screen from the Main screen, select Boot Options > Network Device Order.
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Intel® Server System SR1640TH TPS Setup Item BEV Device #2 2.6.5.8 Functional Architecture Options Available Legacy devices for this Device group. Help Text Set system boot order by selecting the boot option for this position. Boot Manager Screen The Boot Manager screen allows the user to view a list of devices available for booting, and to select a boot device for immediately booting the system. To access this screen from the Main screen, select Boot Manager.
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Functional Architecture 2.6.5.10 Intel® Server System SR1640TH TPS Exit Screen The Exit screen allows the user to choose whether to save or discard the configuration changes made on the other screens. It also allows the user to restore the server to the factory defaults or to save or restore them to set of user-defined default values. If Load Default Values is selected, the factory default settings (noted in bold in the tables in this chapter) are applied.
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Intel® Server System SR1640TH TPS 2.6.6 Functional Architecture Loading BIOS Defaults Different mechanisms exist for resetting the system configuration to the default values. When a request to reset the system configuration is detected, the BIOS loads the default system configuration values during the next POST. You can send the request to reset the system to the defaults in the following ways: Pressing from within the BIOS Setup utility. Moving the clear system configuration jumper.
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Functional Architecture Intel® Server System SR1640TH TPS Figure 32. Connector locations on server board S3420TH 52 Revision 1.
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Intel® Server System SR1640TH TPS 2.7.1.1 Functional Architecture Power Connectors The main power supply connection uses a special designed connector (J9H1) to provide power to both nodes on the same board. Figure 33. Connector Pin-out Table 37.
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Functional Architecture 2.7.1.3 Intel® Server System SR1640TH TPS Front Control Panel Connector The server board S3420TH provides a 34-pin front panel connector (J8K1). The following table provides the pin-out for this connector. Table 40. Front Control Panel header pin-out (J8K1) 2.7.1.
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Intel® Server System SR1640TH TPS Functional Architecture Table 42.
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Functional Architecture 2.7.1.8 Intel® Server System SR1640TH TPS Power to backplane connectors The server board S3420TH provides a 6-pin connector (J7K2) for providing power to SATA HDD directly. The following table provides the pin-out for this connector. Table 45. Power to backplane connector pin-out (J7K2) 2.7.
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Intel® Server System SR1640TH TPS Functional Architecture Figure 34. Jumper locations on board Revision 1.
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Functional Architecture 2.7.2.1 Intel® Server System SR1640TH TPS CMOS Clear (J1G2, J9J1) When enabled, all CMOS settings will be reset to default. Table 46. CMOS Clear (J1G2, J9J1) Name Default Pin To Pin 1-2 Function Normal operation Reset 2-3 CMOS Clear 2.7.2.2 Description BIOS Recovery (J1G3, J9H3) Provide a manual mode of BIOS recovery configures. Table 47.
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Intel® Server System SR1640TH TPS Functional Architecture LSB 1 MSB 1 1 1 Figure 35. Board diagnostic LED locations 2.8 System IO feature Intel® Server System SR1640TH has two identical trays in the chassis. Each tray contains one 2-node computing board S3420TH inside, powered by a single 450W power supply unit. The two trays have identical IO ports on front and rear panel. The two trays are installed horizontally in the chassis, but they are not right-left swappable.
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Functional Architecture Intel® Server System SR1640TH TPS A AC Power Receptacle B Node 2: RMM3 Lite management port G Node 1: USB ports Node 2: USB ports H Node 1: NIC1(lower) and NIC2(upper) connectors D Node 2: NIC1(lower) and NIC2(upper) connectors I Node 1: Video connector E Node 2: Video connector J Tray Identification LED C F Node1: RMM3 Lite-V management port Figure 36.
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Intel® Server System SR1640TH TPS 3. Power Sub-System Power Sub-System The system includes two 450-W power supply units, which are 80 plus energy efficiency, demonstrating climate saver with silver rating. 3.1 Mechanism overview The casing dimension is W 50.5 mm x L 300 mm x H 40.2 mm. This mechanism shall withstand the specified mechanical shock and vibration requirements. Figure 37. Power Supply Mechanical Drawing 3.
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Power Sub-System Intel® Server System SR1640TH TPS Note: Signals that can be defined as low true or high true use the following convention: Signal# = low true. Table 51. Output signal definition 3.
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Intel® Server System SR1640TH TPS 3.4.2 Power Sub-System Input current The maximum input current shall be 15A for each input voltage range as in below table. Table 55. Maximum input current 3.4.3 Input voltage Input current Max power 100-132 VAC 8A 450 Watts 180-264 VAC 4A 450 Watts Input current harmonics The input current drawn on the power line shall not exceed the limits set by IEC-61000-3-2 and JEIDA MIT1 standards. 3.4.
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Power Sub-System 3.4.5.1 Intel® Server System SR1640TH TPS Electrostatic Discharge Susceptibility The power supply complies with the limits defined in EN 55024: 1998 using the IEC 610004-2:1995 test standard and performance criteria B defined in Annex B of CISPR 24.Tested to meet the level 3 requirement. 3.4.5.2 Fast Transient/Burst The power supply complies with the limits defined in EN55024: 1998 using the IEC 61000-45:1995 test standard and performance criteria B defined in Annex B of CISPR 24.
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Intel® Server System SR1640TH TPS 3.4.8 Power Sub-System AC Line Leakage Current The maximum leakage current to ground for each power supply is 3.5 mA when tested at 240 VAC 60 Hz. 3.4.9 Power Recovery The power supply will recover automatically after an AC power failure. AC power failure is defined as any loss of AC power that exceeds the dropout criteria. 3.4.9.1 Voltage Brown Out The power supply should withstand a brownout and recover from it without any damage stated in below table. 3.4.9.
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Power Sub-System 3.5.2 Intel® Server System SR1640TH TPS Output MIN MAX +12V 2A 37 A Remote Sensing (+12VRS) The power supply system output shall have remote sense (12VRS) to compensate for drops in the system for the +12V output. The remote sense input impedance to the power supply shall be greater than 200 ohms on +12VRS. Remote sense shall be able to compensate for a minimum of 400mV drop on the +12V output.
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Intel® Server System SR1640TH TPS Power Sub-System Table 63. Capacitive load 3.5.8 Output +12V Min 10uF Max 11,000uF +5VSB 1uF 350uF Maximum load change The power supply shall continue to operate normally when there is a step change between minimum load and maximum load. 3.5.9 1 A/uS Output voltage rise time The turn on waveform for the +12V output shall be monotonic with less then 5% of overshoot. The rise time from 10% (1.2V) to 90% (10.
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Power Sub-System Intel® Server System SR1640TH TPS Table 65. +12V Over-Voltage Protection (OVP) requirement 3.6.3 Output Voltage MIN MAX +12V +13.3V +14.5V Over-temperature Protection (OTP) The power supply shall be protected against over temperature conditions caused by loss of fan cooling or excessive ambient temperature. In an over temperature condition the PSU shall be shutdown with the exception of the 5VSB output.
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Intel® Server System SR1640TH TPS 3.7.1 Power Sub-System Power supply management controller (PSMC) The PSMC device in the power supply shall derive its power of the 5Vsb output on the system side of the O’ring device and shall be grounded to return. It shall be located at the address set by the A0 and A1 pins. Refer to the specification posted on www.ssiforum.org and www.pmbus.
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Power Sub-System 3.8.2 Intel® Server System SR1640TH TPS Data Format The data format for current, voltage, power, temperature, and fan speed are using the PMBus Literal format. Literal data format: X = Y · 2N X = the sensor value in volts, amps, watts, degrees C, or RPM Y = mantissa. The mantissa is the variable components that changes as the sensor value changes. Y is a 16-bit unsigned value for the READ_VOUT command. For all other READ commands, Y is an 11-bit signed 2’s compliment value.
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Intel® Server System SR1640TH TPS Power Sub-System Table 69. Product Information 3.9.2 Field name Manufacturer name Product name Product part/model number Product version Product serial number Asset tag FRU file ID Field description 3Y POWER YM-2451C SUNNY451AMP200Rxx A 18 digit serial number Not used, code is zero length byte Not required PAD bytes Added as necessary to allow for 8-byte offset to next area Multi-record area Implement as defined by the IPMI FRU document.
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Cooling Sub-System 4. Intel® Server System SR1640TH TPS Cooling Sub-System Several components and configuration requirements make up the cooling sub-system of the chassis. These include processors, chipsets, VR heatsinks, system fan module, power supply fans, CPU air duct, and drive bay population. All are necessary to provide and regulate the air flow and air pressure needed to maintain the system’s thermals when operating at or below the maximum specified thermal limits.
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Intel® Server System SR1640TH TPS 4.2 Cooling Sub-System Three-Fan Module The system tray includes a fan assembly consisting of three managed 40x40x48 mm dualrotor, multi-speed fans. Three fans are using the same 8-pin fan connectors. They provide the primary cooling for the processors, memory, and the hard drive bays on the front panel. Each fan is designed for tool-less insertion to or removal from the fan module housing.
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Cooling Sub-System Intel® Server System SR1640TH TPS Figure 41. Air Duct Module assembly process 74 Revision 1.
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Hard Disk Drive Support 5. Intel® Server System SR1640TH TPS Hard Disk Drive Support The server system provides four hard drive bays, each tray has two hard drive bays. Each hard drive bay can support one fix 3.5-inch SATA/SAS HDD. 5.1 Hard Disk Drive Bays Each tray in the server system 1U chassis can support up to two carrier-mounted fix SATA or SAS 3.5-inch hard disk drives. The drives cannot be “electrically” hot-swapped while the system power is applied. Figure 42.
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Intel® Server System SR1640TH TPS Hard Disk Drive Support Figure 43. 3.5-inch HDD Assembly Overview Figure 44. Install HDD assembly into tray 76 Revision 1.
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Front Panel Control and Indicators 6. Intel® Server System SR1640TH TPS Front Panel Control and Indicators The Intel® Server System SR1640TH Front Control Panel integrates control buttons, LEDs, and USB ports. The control panel assembly is pre-assembled and fixed to the chassis. Node 1 Node 2 Power Button/Power LED E H System ID Button/ID LED F I Node USB ports A G LAN 1 Activity LED B J LAN 2 Activity LED C K Node status LED D L Figure 45. Front Control Panel 6.
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Intel® Server System SR1640TH TPS Front Panel Control and Indicators Table 71. Front LED Indicator Functions 6.2.1 Power / Sleep LED Table 72. SSI Power LED Operation State Power Off Power On Power Mode Non-ACPI Non-ACPI LED Off Solid On Description System power is off and the BIOS has not initialized the chipset. System power is on but the BIOS has not yet initialized the chipset.
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Front Panel Control and Indicators Color Amber State Blink Criticality Non-critical Intel® Server System SR1640TH TPS Description 3. PCI Express* correctable link errors. Integrated BMC detected 1. Redundancy loss such as a power supply or fan. Applies only if the associated platform subsystem has redundancy capabilities. 2. CPU disabled – if there are two CPUs and one CPU is disabled. 3. Fan alarm – Fan failure. Number of operational fans should be more than minimum number needed to cool the system.
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Intel® Server System SR1640TH TPS Front Panel Control and Indicators Controlled by the Chassis Identify command (IPMI) Controlled by the Chassis Identify LED command (OEM) Table 74. System ID LED Indicator States State Identify active via button LED State Solid on Identify active via command ~1 Hz blink Off Off There is no precedence or lock-out mechanism for the control sources. When a new request arrives, all previous requests are terminated.
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Configuration Jumpers 7. Intel® Server System SR1640TH TPS Configuration Jumpers The following chapter provides a summary and description of configuration, test, and debug jumpers on the server board S3420TH, which is used in Intel® Server System SR1640TH. Figure 46. Jumper location on Server Board S3420TH Revision 1.
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Intel® Server System SR1640TH TPS 7.1 Configuration Jumpers Force IBMC Update (J1A1, J5A1) When performing a standard BMC firmware update procedure, the update utility places the BMC into an update mode, allowing the firmware to load safely onto the flash device.
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Configuration Jumpers Intel® Server System SR1640TH TPS Steps for clearing the CMOS 1. 2. 3. 4. Power down server. Pull out the tray and PSU. Connect tray and PSU outside chassis. Plug in the power cord to PSU. Move the jumper (J1B4) from the default operating position, covering pins 1 and 2, to the reset / clear position, covering pins 2 and 3. 5. Wait five seconds. 6. Remove AC power. 7. Move the jumper back to default position, covering pins 1 and 2. 8. Close the server chassis. 9.
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Intel® Server System SR1640TH TPS Environmental and Regulatory Specification 8. Environmental and Regulatory Specifications 8.1 System Level Environmental Limits The following table defines the system level operating and non-operating environmental limits. Table 78.
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Environmental and Regulatory Specification Intel® Server System SR1640TH TPS WARNING Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the equipment manufacturer. Discard used batteries according to manufacturer’s instructions. ADVARSEL! Lithiumbatteri - Eksplosionsfare ved fejlagtig håndtering. Udskiftning må kun ske med batteri af samme fabrikat og type. Levér det brugte batteri tilbage til leverandøren.
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Intel® Server System SR1640TH TPS Environmental and Regulatory Specification compliance testing. For more information please contact your local Intel Representative. This is an FCC Class A device and its use is intended for a commercial type market place. 8.5 Use of Specified Regulated Components To maintain the UL listing and compliance to other regulatory certifications and/or declarations, the following regulated components must be used and conditions adhered to.
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Environmental and Regulatory Specification Compliance Regional Description Compliance Reference FCC CFR 47, Part 15 (Emissions) CENELEC Europe Germany International Japan Korea Russia Intel® Server System SR1640TH TPS Compliance Reference Marking Example This device complies with Part 15 of the FCC Rules.
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Intel® Server System SR1640TH TPS 8.6 Environmental and Regulatory Specification Electromagnetic Compatibility Notices 8.6.1 FCC Verification Statement (USA) This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
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Environmental and Regulatory Specification 8.6.3 Intel® Server System SR1640TH TPS Europe (CE Declaration of Conformity) This product has been tested in accordance too, and complies with the Low Voltage Directive (73/23/EEC) and EMC Directive (89/336/EEC). The product has been marked with the CE Mark to illustrate its compliance. 8.6.
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Intel® Server System SR1640TH TPS Environmental and Regulatory Specification slides. You must also consider the weight of any other device installed in the rack. A crush hazard exists should the rack tilt forward which could cause serious injury. Temperature: The temperature, in which the server operates when installed in an equipment rack, must not go below 5 °C (41 °F) or rise above 40 °C (104 °F). Extreme fluctuations in temperature can cause a variety of problems in your server.
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Environmental and Regulatory Specification 8.8 Intel® Server System SR1640TH TPS Power Cord Usage Guidelines Warning: Do not attempt to modify or use an AC power cord set that is not the exact type required. You must use a power cord set that meets the following criteria: • Rating: In the U.S. and Canada, cords must be UL (Underwriters Laboratories, Inc.) Listed/CSA (Canadian Standards Organization) Certified type SJT, 18-3 AWG (American Wire Gauge). Outside of the U.S.
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Intel® Server System SR1640TH TPS Compliance Regional Description Intel Internal Specification Europe Environmental and Regulatory Specification Compliance Reference All materials, parts and subassemblies must not contain restricted materials as defined in Intel’s Environmental Product Content Specification of Suppliers and Outsourced Manufacturers – http://supplier.intel.com/ehs/environmental.
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Environmental and Regulatory Specification Compliance Description Intel® Server System SR1640TH TPS Compliance Reference Ground Connection 60950 Deviation for Nordic Countries Country of Origin Logistic Requirements Applied to products to indicate where product was made. Revision 1.0 Compliance Reference Marking Example 注意：本設備包括多條電源系統電纜。為避免遭受電擊，在進行維修之前應斷開兩（2）條電源系統電纜。 German: Dieses Geräte hat mehr als ein Stromkabel.
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Intel® Server System SR1640TH TPS Appendix A: Integration and Usage Tips Appendix A: Integration and Usage Tips Before attempting to integrate and configure your system, you should reference this section, which provides a list of useful information. After the system is integrated with processors, memory, and peripheral devices, the FRUSDR utility must be run to load the proper Sensor Data Record data to the integrated Server Management subsystem.
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Appendix B: Integrated BMC Sensor Tables Intel® Server System SR1640TH TPS Appendix B: Integrated BMC Sensor Tables This appendix lists the sensor identification numbers and information about the sensor type, name, supported thresholds, assertion and de-assertion information, and a brief description of the sensor purpose. See the Intelligent Platform Management Interface Specification, Version 2.0, for sensor and event/reading-type table information.
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Intel® Server System SR1640TH TPS Appendix B: Integrated BMC Sensor Tables Rearm Sensors The rearm is a request for the event status for a sensor to be rechecked and updated upon a transition between good and bad states. Rearming the sensors can be done manually or automatically. This column indicates the type supported by the sensor.
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Appendix B: Integrated BMC Sensor Tables Sensor Name3 Sensor # Platform Applicability Sensor Type Event / Reading Type All Voltage 02h Threshold 01h All Voltage 02h Threshold 01h All Voltage 02h Threshold 01h All Voltage 02h Threshold 01h All Voltage 02h Threshold 01h All Voltage 02h Threshold 01h Threshold 01h [u,l] [c,nc] 01 - Limit exceeded BB +1.1V11h P1 Vccp BB +1.1V12h P2 Vccp BB +1.5V P1 DDR3 BB +1.5V P2 DDR3 BB +1.8V AUX BB +3.3V 13h 14h 15h 16h BB +3.
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Intel® Server System SR1640TH TPS Sensor Name3 Sensor # Front panel temp 21h PCH Thermal Margin 22h Process or MEMT HRM MRGN Platform Applicability Sensor Type All Temper ature 01h All Temper ature 01h 23h All Temper ature 01h Fan Tach Sensors 30h– 34h Chassisspecific Process or Therm Margin 62h All Process or Therm Ctrl % 64h Process or VRD Temp 66h CATER R 68h PCH Thermal Trip 6Ah All All 01h Threshold 01h Threshold 01h Threshold 04h 01h Temper ature Threshold Temp
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Appendix C: POST Code LED Decoder Intel® Server System SR1640TH TPS Appendix C: POST Code LED Decoder During the system boot process, the BIOS executes a number of platform configuration processes, each of which is assigned a specific hex POST code number. As each configuration routine is started, the BIOS displays the POST code to the POST Code Diagnostic LEDs on the back edge of the server board.
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Intel® Server System SR1640TH TPS Appendix C: POST Code LED Decoder Table 82. POST Progress Code LED Example Diagnostic LED Decoder O = On, X=Off Upper Nibble Lower Nibble Checkpoint LED Host Processor MSB 8h #7 4h #6 2h #5 1h #4 8h #3 4h #2 2h #1 Description LSB 1h #0 0x04h X X X X X O X X Early processor initialization (flat32.
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Appendix C: POST Code LED Decoder Intel® Server System SR1640TH TPS Diagnostic LED Decoder O = On, X=Off Upper Nibble Lower Nibble Checkpoint 0x9Ah O 0x9Bh O Description LSB 4h 2h 1h 8h 4h 2h 1h #6 #5 #4 #3 #2 #1 #0 Detecting the mouse X X O X X O O Detecting the presence of mouse X X O X O O X Enabling the mouse X X O X O O O 0xB0h O X O O X X X X Resetting fixed media device 0xB1h O X O O X X X O Disabling fixed media device 0xB2h O X O O X X O X 0xB3h O X O O X
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Intel® Server System SR1640TH TPS Appendix D: POST Code Errors Appendix D: POST Code Errors Whenever possible, the BIOS outputs the current boot progress codes on the video screen. Progress codes are 32-bit quantities plus optional data. The 32-bit numbers include class, subclass, and operation information. The class and subclass fields point to the type of hardware being initialized. The operation field represents the specific initialization activity.
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Intel® Server System SR1640TH TPS Appendix D: POST Code Errors Error Code 8171 8180 8181 8190 8198 8300 84F2 84F3 84F4 84FF 8500 8520 8521 8522 8523 8524 8525 8526 8527 8528 8529 852A 852B 852C 852D 852E 852F 8540 8541 8542 8543 8544 8545 8546 8547 8548 8549 854A 854B 854C 854D 854E 854F 8560 8561 8562 8563 8564 8565 8566 8567 8568 8569 856A 856B 856C 856D 856E 856F 8580 8581 Error Message Processor 02 failed Self Test (BIST).
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Intel® Server System SR1640TH TPS Error Code 8582 8583 8584 8585 8586 8587 8588 8589 858A 858B 858C 858D 858E 858F 85A0 85A1 85A2 85A3 85A4 85A5 85A6 85A7 85A8 85A9 85AA 85AB 85AC 85AD 85AE 85AF 8601 8602 8603 8604 9000 9223 9226 9243 9246 9266 9268 9269 9286 9287 9288 92A3 92A9 92C6 92C7 Appendix D: POST Code Errors Error Message DIMM_A3 Correctable ECC error encountered. DIMM_A4 Correctable ECC error encountered. DIMM_B1 Correctable ECC error encountered. DIMM_B2 Correctable ECC error encountered.
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Intel® Server System SR1640TH TPS Appendix D: POST Code Errors Error Code 92C8 94C6 94C9 9506 95A6 95A7 95A8 9609 9641 9667 9687 96A7 96AB 96E7 0xA022 0xA027 0xA028 0xA421 0xA500 0xA501 0xA5A0 0xA5A1 0xA5A4 0xA6A0 Error Message Serial Port component encountered an output error. LPC component encountered a controller error. LPC component encountered a resource conflict error. ATA/ATPI component encountered a controller error. PCI component encountered a controller error.
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Intel® Server System SR1640TH TPS Glossary Glossary Term ACPI Definition Advanced Configuration and Power Interface AP Application Processor APIC Advanced Programmable Interrupt Control ASIC Application Specific Integrated Circuit ASMI Advanced Server Management Interface BIOS Basic Input/Output System BIST Built-In Self Test BMC Baseboard Management Controller Bridge Circuitry connecting one computer bus to another, allowing an agent on one to access the other BSP Bootstrap Processor
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Glossary Intel® Server System SR1640TH TPS Term LAN Local Area Network Definition LCD Liquid Crystal Display LED Light Emitting Diode LPC Low Pin Count LUN Logical Unit Number MAC Media Access Control MB 1024KB MCH Memory Controller Hub MD2 Message Digest 2 – Hashing Algorithm MD5 Message Digest 5 – Hashing Algorithm – Higher Security ms milliseconds MTTR Memory Type Range Register Mux Multiplexor NIC Network Interface Controller NMI Nonmaskable Interrupt OBF Output Buffer
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Intel® Server System SR1640TH TPS Term VRD Voltage Regulator Down Word 16-bit quantity ZIF Zero Insertion Force Glossary Definition Revision 1.
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Reference Documents Intel® Server System SR1640TH TPS Reference Documents Refer to the following documents for additional information: Intel® Dynamic PowerTechnology Node Manager 1.5 External Interface Specification using IPMI, 2007. Intel Corporation. Node Power and Thermal Management Architecture Specification v1.5, rev.0.79. 2007, Intel Corporation. Intel® Server System Integrated Baseboard Management Controller Core External Product Specification, 2007 Intel Corporation.