Data Sheet

ISM14585-L35 Specification
DOC-DS-14585-201807-3.0
Confidential Inventek Systems
Page 47
6. Enable the I2C Controller by writing a 1 in bit 0 of the I2C_ENABLE register.
7. Now write transfer direction and data to be sent to the I2C_DATA_CMD register.
If the I2C_DATA_CMD register is written before the I2C Controller is enabled, the
data and commands are lost as the buffers are kept cleared when I2C Controller
is disabled.
8. This step generates the START condition and the address byte on the I2C
Controller. Once I2C Controller is enabled and there is data in the TX FIFO, I2C
Controller starts reading the data.
Note: Depending on the reset values chosen, steps 2, 3, 4, and 5 may not be necessary
because the reset values can be configured. The values stored are static and do not
need to be reprogrammed if the I2C Controller is disabled, with the exception of the
transfer direction and data.
Master Transmit and Master Receive
The I2C Controller supports switching back and forth between reading and writing
dynamically. To transmit data, write the data to be written to the lower byte of the
I2C_DATA_CMD_REG register. The CMD bit [8] should be written to 0 for I2C write
operations.
Subsequently, a read command may be issued by writing "don't cares" to the lower byte
of the I2C_DATA_CMD_REG register, and a 1 should be written to the CMD bit.
The I2C Controller master continues to initiate transfers as long as there are commands
present in the transmit FIFO. If the transmit FIFO becomes empty, the master inserts a
STOP condition after completing the current transfer.
9.7.7 DISABLING THE I2C CONTROLLER
The register I2C_ENABLE_STATUS is added to allow software to unambiguously
determine when the hardware has completely shut down in response to the
I2C_ENABLE register being set from 1 to 0. Only one register is required to be
monitored.
Procedure