Data Sheet

ISM14585-L35 Specification
DOC-DS-14585-201807-3.0
Confidential Inventek Systems
Page 51
The data format is similar to the standard serial (sout and sin) data format. Each data
character is sent serially, beginning with a start bit, followed by 8 data bits, and ending
with at least one stop bit.
Thus, the number of data bits that can be sent is fixed. No parity information can be
supplied and only one stop bit is used while in this mode.
Trying to adjust the number of data bits sent or enable parity with the Line Control
Register (LCR) has no effect. When the UART is configured to support IrDA 1.0 SIR it
can be enabled with Mode Control Register (MCR) bit 6. When the UART is not
configured to support IrDA SIR mode, none of the logic is implemented and the mode
cannot be activated, reducing total gate counts. When SIR mode is enabled, and active,
serial data is transmitted and received on the sir_out_n and sir_in ports, respectively.
Transmitting a single infrared pulse signals a logic zero, while a logic one is represented
by not sending a pulse. The width of each pulse is 3/16th of a normal serial bit time.
Thus, each new character begins with an infrared pulse for the start bit. However,
received data is inverted from transmitted data due to the infrared pulses energizing the
photo transistor base of the IrDA receiver, pulling its output low. This inverted transistor
output is then fed to the UART sir_in port, which then has correct UART polarity. Figure
23 shows the timing diagram for the IrDA SIR data format in comparison to the standard
serial format.
Figure 23 IrDA SIR Data Format
As detailed in the IrDA 1.0 SIR, the UART can be configured to support a low-power
reception mode. When the UART is configured in this mode, the reception of SIR pulses
of 1.41μs (minimum pulse duration) is possible, as well as nominal 3/16th of a normal
serial bit time. Using this low-power reception mode requires programming the Low
Power Divisor Latch (LPDLL/LPDLH) registers.