ISM14585-L35 Specification
DOC-DS-14585-201807-3.0
Confidential Inventek Systems
Page 61
Figure 29 SPI Master/Slave, Mode 2: SPI_POL=1 and SPI_PHA=0
For the MSB bit refer to Note 1.
Figure 30 SPI Master/slave, Mode 3: SPI_POL=1 and SPI_PHA=1
For the MSB bit refer to Note 1
