Data Sheet

ISM14585-L35 Specification
DOC-DS-14585-201807-3.0
Confidential Inventek Systems
Page 66
Timer 0 PWM Mode
If bit TIM0_CTRL in the TIMER0_CTRL_REG is set, Timer 0 will start running.
SWTIM_IRQ will be generated and the T0-counter will load its start value from the
TIMER0_RELOAD_M_REG register, and will decrement on each clock. The ON-
counter also loads its start value from the TIMER0_ON_REG register and decrements
with the selected clock.
When the T0-counter reaches zero, the internal signal T0-toggle will be toggled to select
the TIMER0_RELOAD_N_REG whose value will be loaded in the T0-counter. Each
time the T0-counter reaches zero it will alternately be reloaded with the values of the
M0- and N0-shadow registers respectively. PWM0 will be high when the M0-value
decrements and low when the N0-value decrements. For PWM1 the opposite is
applicable since it is inverted. If bit PWM_MODE in the TIMER0_CTRL_REG register is
set, the PWM signals are not HIGH during the ‘high time’ but output a clock in that
stage. The frequency is based on the clock settings defined in the CLK_PER_REG
register (also in 32 kHz mode), but the selected clock frequency is divided by two to get
a 50 % duty cycle.
If the ON-counter reaches zero it will remain zero until the T0-counter also reaches
zero, while decrementing the value loaded from the TIMER0_RELOAD_N_REGregister
(PWM0 is low). The counter will then generate an interrupt (SWTIM_IRQ). The ON-
counter will be reloaded with the value of the TIMER0_ON_REG register. The T0-
counter as well as the M0-shadow register will be loaded with the value of the
TIMER0_RELOAD_M_REG register. At the same time, the N0-shadow register
will be loaded by the TIMER0_RELOAD_N_REG register. Both counters will be
decremented on the next clock again and the sequence will be repeated.
Note that it is possible to generate interrupts at a high rate, when selecting a high clock
frequency in combination with low counter values. This could result in missed interrupt
events.
During the time that the ON-counter is non-zero, new values for the ON-register, M0-
register and N0-register can be written, but they are not used by the T0-counter until a
full cycle is finished. More specifically, the newly written values in the
TIMER0_RELOAD_M_REG and TIMER0_RELOAD_N_REG registers are only stored
into the shadow registers when the ON-counter and the T0-counter have both reached
zero and the T0-counter was decrementing the value loaded from the
TIMER0_RELOAD_N_REG register (see Figure 34).