Data Sheet

ISM14585-L35 Specification
DOC-DS-14585-201807-3.0
Confidential Inventek Systems
Page 84
9.15 PDM Interface
The Pulse Density Modulation (PDM) interface provides a serial connection for up-to 2
input devices (e.g MEMS microphones) or output devices. The interfaces have a
common clock PDM_CLK and one input PDM_DI which is capable of carrying two
channels. Figure 41 shows a typical connection of two microphones sharing one data
line.
The PDM input data has a 1-bit data length and is encoded so that the left channel is
clocked in on the falling edge of PDM_CLK and the right channel is clocked on the
rising edge of PDM_CLK as shown in Figure 42.
The 1 bit data stream is down-sampled to 24 bits PCM samples in the HW Sample Rate
Converter (SRC) for further processing in the DSP.
The interface supports MEMS microphone sleep mode by disabling the PDM_CLK.
The PDM interface signals are available through the PPA multiplexer. The interface
levels are determined by the IO group on which the PDM signals are mapped. Those
signals can be hard wired to 1.8 V and 3.3 V.
Features:
• PDM_CLK frequency 62.5 kHz - 4 MHz
• Down-sampling to 24 bits in SRC
• PDM_CLK on/off to support Sleep mode
• PDM_DATA (input): 1 Channel in stereo format
• PDM_DATA (output): 2 Channels in mono format, 1 Channel in stereo format
• Programmable Left/Right channel selection
Figure 41 PDM with dual mic interface