Data Sheet

ISM14585-L35 Specification
DOC-DS-14585-201807-3.0
Confidential Inventek Systems
Page 87
Figure 44 PCM controller
9.16.1 PCM ARCHITECTURE
9.16.1.1 INTERFACE SIGNALS
• PCM_FSC, strobe signal input, output. Supports 8/16/32/48/96/128/192kHz. Can
generate an interrupt to the CPU.
• PCM_CLK, PCM clock input, output.
• PCM_DO, PCM Data output, push pull or open drain with external pull-up
resistor.
• PCM_DI, PCM Data input.
PCM interface can be powered down by the PCM1_CTRL_REG[PCM_EN] = 0.
9.16.1.2 CHANNEL ACCESS
The PCM interface has two 32-bit channels for TX and RX. Channels are accessed
through 32 bits registers:
• PCM1_OUT1_REG and PCM1_OUT2_REG,
• PCM1_IN1_REG and PCM1_IN2_REG.
The registers are only word-wise (32 bits) accessible by the CPU or the DMA via the
APB-32 bridge
.
The 32 bits registers are arranged as 8 channels of 8 bits, named channel 1 to
channel8.
By a flexible clock inversion, channel delay and strobe length adjustment various format
like PCM, I2S, TDM and IOM2 can be made