Data Sheet

ISM4343 Specification
DOC-DS-20074-5.3
Inventek Systems
Page 43
Each regulator output must be connected directly to its recommended output capacitor per the
Power source. All the power supply pins should be decoupled.
Additional filtering and bypassing of the RF supply voltages
13 ISM4343-WBM-L151 PCB LAYOUT GUIDELINES
13.1 DC Power
Use wide traces for power supply lines. Know the maximum currents being carried on each
power supply trace, and make the trace widths proportionate to the current (especially for long
trace lengths). Where possible, fill large areas with copper to distribute the highest currents.
These measures minimize IR drops, line inductance, and switching transients.
• Use several plated via holes to connect power supply traces between layers. The number of vias
used should be proportional to the current being routed.
• Avoid loops in the supply distribution traces. Current-carrying loops are essentially antennas
radiating electromagnetic fields that may corrupt transceiver performance or cause regulatory
electromagnetic interference (EMI) test failures.
• High current traces should be kept as short as possible and devices on the same supply should
be fed from a ‘star point’ rather than ‘daisy-chained’.
• Avoid loop in the VDD supply and clock supply traces, VDD supply traces and clock supply
traces to be independent where possible.
13.2 Antenna port RF signal
General guidelines for routing RF signals of WLAN/BT antenna port. RF signals require
controlled-impedance lines to minimize mismatch losses and efficiently transfer energy from
source to load. The line impedance depends upon several variables — trace width and thickness,
co-planar ground spacing, height of dielectric material between the trace and ground plane(s),
and dielectric constant of the PCB material. Given the PCB material selected, the geometry of
the micro-strip, strip-line, or co-planar grounded waveguide (CGW) elements must be designed
properly to provide the desired 50-Ω impedance. Design of micro-strip, strip-line, and CGW
elements is well documented and supported in many microwave software applications.
Additional RF-specific PCB design guidelines include:
• Keep the RF traces on the component sides (top or bottom layer) using micro-strip or CGW
techniques where possible.
• Screen these traces to avoid electromagnetic interference.
• Use internal layers with strip-line techniques if necessary.
• Maintain continuous ground below micro-strip traces, beside CGW traces, and above and
below strip-line traces.
• Keep traces short and direct, to minimize loss and undesired coupling.
• Front-end losses increase the system noise figure — keep traces before the first gain stage as
short as possible and use low-loss capacitors and inductors.