Product Description

nanoBTS Product Description Hardware Specification
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3.2 Internal
3.2.1 Power Supply
Input Voltage 36-57VDC (to cover power-over-ethernet range)
Input Current max.
500mA from an input voltage of 37V. Input capacitor <180uf
when operating (less during signature detect – see below)
Efficiency min. 80%
Signature Power input signature to comply with 802.3af rel 3
V_I slope (at 2.7 to 10.1V) 23.75K to26.25K ohms
V offset <1.9V
I offset <10uA
Input capacitance 50 to 110nf
Input inductance >100uH
IEEE802.3af
wiring
Option B or A (B is preferred)
Isolation 1500V at 50-60Hz for 60S, resistance >2M ohms at 500V
Turn on Voltage <44V
Turn off Voltage >30V
48V DC Supply 165 units also have a direct DC power connector
3.2.2 OCXO
Frequency 26MHz
Accuracy (all causes)
±100 × 10
-9
per two years
Adjustment / calibration
Under processor DAC control or PLL locked to a TIB input with
ability to calibrate free run frequency to a TIB input or NWL.
Adjustment DAC 12 bits +/- 0.5LSB differential non linearity
PLL Control Signals LOCKED (PLL is in lock)
XSENSE_1 (inverted PLL error analog value to ADC)
XSENSE_2 (non inverted PLL error analog value to ADC)
PLL_CE (tristates PLL to allow OCXO to free run at DAC
value)
3.2.3 Backhaul Sub-System
Processor 139/140/178: MPC855T
165: MPC875
50MHz core and bus (32bit A&D)
Memory Flash 8M
SDRAM 8M
EEPROM 64kbit