Product Description

nanoBTS Product Description Software Specification
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5.2 Explicitly Not Supported
Multi-Slot Circuit Switched Data
EDGE on 139 series BTS (supported by 165 with SR3 software)
Half-rate speech codec (HR)
Advanced Multi-Rate speech codec (AMR) on 139/140 series BTS (supported by
165 with SR3 software)
IP Security
IP Version 6
HTTP server
VGCS and VBS
SOLSA
5.3 Standards
The base software support level is 3GPP Release 99 unless otherwise stated.
5.4 Reset Behaviour
5.4.1 Boot
On Power on, the bootstrap code changes the LED to state LED_SELF_TEST (note that
this may actually mean that the LED is turned ‘off’ if the LED is disabled in EEPROM
config – see section 5.8.2.
The bootstrap code performs Power-On-Self-Test (POST) on "cold" boot (if "Disable
POST" flag is cleared in EEPROM). Warm boots do not perform POST.
The POST procedures check
RAM on all processors
Code Memory on all processors – checksum verification of code banks
EEPROM Memory – checksum verification of attribute blocks
5.4.2 Software Code Banks and Software Bank Activation
nanoBTS software is stored in two banks, and the active bank is indicated by a EEPROM
switch. If the active bank POST fails, then the inactive bank will be booted – with an
associated Failure Event Report. If the inactive bank POST also fails, then the LED
indicates LED_SELF_TEST_FAILURE.
nanoTRX software is downloaded to the inactive bank using the software download tool
BtsInstaller (see [INST_300]). Software download proceeds without interrupting the
operation of the BTS. The active bank flag is then altered. The next time the BTS restarts,
the new software will be run.