Product Description

nanoBTS Product Description Software Implementation (informative)

6 SOFTWARE IMPLEMENTATION (INFORMATIVE)

6.1 139/140 Platform

The hardware platform for the BTS is shown in Error! Reference source not found..

OCXO

SRAM

VBC

ULS

DLP

VBC

SRAM

FPGA

Reset

Async

HDLC

Reset

Async

Reset

Async

AGC

SYNTH

AGC

SYNTH

Backhaul

Ethernet

PHY

Power PC

ULM

TRX Device

SDRAM

FLASH

EEPROM

ADC

DAC

PSU

48v

Figure 9 - Internal architecture of the 139/140 nanoBTS

It consists of three handset baseband devices (ADmsp430), a general purpose

communications processor (MPC855T), and an FPGA based interprocessor

communications buffer and synchronisation channel.

The ADmsp430 device consists of an ARM7 microcontroller, a Viterbi coprocessor, a

ciphering engine, timing and control logic (the TCU), and an Analog Devices 21B series

DSP device. The ARM7 runs AMX with application code written in ANSI C. The DSP runs

native assembler.