Data Sheet

4-Level FSK Modem Data Pump Page 17 of 47 MX919B PRELIMINARY INFORMATION

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TXOUT Signal

from Task 1 from Task 2

Task 1 data Task 2 data

Data from C to Block Bufferµ

Task from C to Command

IRQ Bit of Status Register

BFREE Bit of Status Register

IRQ Output (IRQEN = '1')

Figure 9: Transmit Task Overlapping

When the modem is in receive mode, the µC should wait until the BFREE bit of the Status Register is '1', then

write the desired task to the Command Register.

Once the byte containing the desired task has been written to the Command Register, the modem will:

Set the BFREE bit of the Status Register to '0'.

Wait until enough received symbols are in the De-interleave Buffer.

Decode them as needed and transfer the resulting binary data to the Data Block Buffer

Then the modem will set the BFREE and IRQ bits of the Status Register to '1', (causing the

IRQ output

to go low if the IRQEN bit of the Mode Register has been set to '1') to tell the µC that it may read from

the Data Block Buffer and write the next task to the modem. If more than 1 byte is contained in the

buffer, byte number 0 of the data will be read out first.

In this way, the µC can read data and write a new task to the modem while the received symbols needed for

this new task are being received and stored in the De-interleave Buffer.

RXIN Signal

for Task 1 for Task 2

IRQ Output (IRQEN = '1')

IRQ Bit of Status Register

BFREE Bit of Status Register

Task 1 Task 2

Task 1 data

Data from Block Buffer to Cµ

Task from C

to Command Register

Figure 10: Receive Task Overlapping

Detailed timings for the various tasks are provide in Figure 11 and Figure 12.