Data Sheet

4-Level FSK Modem Data Pump Page 24 of 47 MX919B PRELIMINARY INFORMATION

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The 'Hold' setting disables the feedback loop of the PLL which continues to run at a rate determined only by

the actual crystal frequency and the setting of the Control Register CKDIV bits, not the PLL's operating

frequency immediately prior to the 'Hold' setting.

4.5.4 Mode Register

The contents of this 8-bit write only register control the basic operating modes of the modem:

76543210

Mode Register

IRQEN RXEYE

INVSYM Set to '000'

Tx/Rx

PSAVE

4.5.4.1 Mode Register B7: IRQEN - IRQ Output Enable

When this bit is set to '1', the IRQ chip output pin is pulled low (V

) given the IRQ bit of the Status Register

is a '1'.

4.5.4.2 Mode Register B6: INVSYM - Invert Symbols

This bit controls the polarity of the transmitted and received symbol voltages.

B6 Symbol Signal at TXOUT Signal at RXAMPOUT

+3 Above V

BIAS

Below V

BIAS

-3 Below V

BIAS

Above V

BIAS

+3 Below V

BIAS

Above V

BIAS

-3 Above V

BIAS

Below V

BIAS

Note: B6 must be normally set to the same value in Tx and Rx devices for successful operation.

4.5.4.3 Mode Register B5: RXTX/ - Tx/Rx Mode

Setting this bit to '1' places the modem into the Transmit mode, clearing it to '0' puts the modem into the

Receive mode.

Note: Changing between receive and transmit modes will cancel any current task.