Data Sheet

4-Level FSK Modem Data Pump Page 25 of 47 MX919B PRELIMINARY INFORMATION
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4.5.4.4 Mode Register B4: RXEYE - Show Rx Eye
This bit should normally be set to '0'. Setting it to '1' when the modem is in receive mode configures the
modem for a special test mode, in which the input of the Tx output buffer is connected to the Rx Symbol/Clock
extraction circuit at a point which carries the equalized receive signal. This may be monitored with an
oscilloscope (at the TXOUT pin itself), to assess the quality of the complete radio channel including the Tx
and Rx modem filters, the Tx modulator and the Rx IF filters, and FM demodulator.
This mode is provided because observation of the direct discriminator output of a root raised cosine Tx filtered
signal (before Rx equalization) is not very recognizable so it is generally not useful.
The resulting eye diagram (for reasonably random data) should ideally be as shown in the following Figure
14, with 4 distinct and equally spaced level crossing points.
Figure 14: Ideal 'RXEYE' Signal
Note:
A two-channel oscilloscope is needed for this testing. One channel of the oscilloscope should be
placed on the signal path of interest, such as the Tx output. If the Rx eye diagram is to be viewed, set
the “RXEYE” bit in the Mode Register to “1” and connect the oscilloscope probe downstream of the
external RC filter on the TXOUT pin. (This Mode Register bit causes the MX919B to enter a special
test mode whereby the Rx output is placed on the TXOUT pin. This mode is provided because
observation of the direct discriminator output of a root raised cosine Tx filtered signal is not very
recognizable and is generally not useful.)
The other oscilloscope channel should be used for triggering and should ideally be placed on the
transmitting MX919B
IRQ pin. This will allow the triggering to be synchronized with the completion of
each transmitted data word. If this triggering location is not practical, use the receiving MX919B
IRQ signal for triggering. The falling edge of the IRQ line should be used for triggering. The data
stream used for this testing should have a reasonably random structure.
4.5.4.5 Mode Register B3: PSAVE - Powersave
When this bit is a ‘1’, the modem will be in a ‘powersave’ mode in which the internal filters, the Rx Symbol and
Clock extraction circuits, and the Tx output buffer will be disabled. The TXOUT pin will be connected to V
BIAS
through a high value internal resistance. The Xtal clock oscillator, Rx input amplifier and the µC interface
logic will continue to operate.
Setting the PSAVE bit to ‘0’ restores power to all of the chip circuitry.
Note: The internal filters, and therefore the TXOUT pin in transmit mode, will take approximately 20 symbol-
times to settle after the PSAVE bit has gone from ‘1’ to ‘0’.
4.5.4.6 Mode Register B2, B1, B0
These bits should be set to '000'.