Data Sheet
4-Level FSK Modem Data Pump Page 43 of 47 MX919B PRELIMINARY INFORMATION
©2001 MX•COM, INC. www.mxcom.com Tele: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 20480170.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.
6.1.4 Timing
µC Parallel Interface Timings (see Figure 28 ) Notes Min. Typ. Max. Units
t
ACSL
Address valid to
CS low time
0 ns
t
AH
Address hold time 0 ns
t
CSH
CS hold time
0 ns
t
CSHI
CS high time
1 6 clock cycles
t
CSRWL
CS to WR or RD low time
0 ns
t
DHR
Read data hold time 0 ns
t
DHW
Write data hold time 0 ns
t
DSW
Write data setup time 90 ns
t
RHCSL
RD high to CS low time (write)
0 ns
t
RACL
Read access time from
CS low
2 175 ns
t
RARL
Read access time from
RD low
2 145 ns
t
RL
RD low time
200 ns
t
RX
RD high to D0-D7 3 state time
50 ns
t
WHCSL
WR high to CS low time (read)
0 ns
t
WL
WR low time
200 ns
Timing Notes:
1. Xtal/Clock cycles at the XTAL/CLOCK pin.
2. With 30pF max to V
SS
on D0 - D7 pins.