User Manual

SECTION 1: THEORY OF OPERATION
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Baseband
This circuitry amplifies the audio from each receiver, routes it through a RF multiplexer, and selects the
audio from the receiver with the highest RSSI value. The comparator circuit on the previous sheet
controls it.
There are three (3) channels of audio, with separate gain and DC offset adjustments to compensate for
performance differences in the receivers. For example, incoming audio from receiver 1 appears at
AUDIO 1. An op amp (U12D) is then amplifies the audio. A pot (R72) adjusts the gain, while another pot
(R57) adjusts the DC offset on the output. The amplifier output passes through a RF multiplexer (U19B),
then drives a low pass filter (U9) through another op amp (U12A) and through the AUDIO_OUT line,
which goes to a switch (S3) and to pin 4 of a connector (J3).
The remaining audio circuits work in the same manner.
The output from U19B also appears on DISC_AUDIO, which goes to the CPU (U1) and from there the
audio is demodulated by the modems.
Receiver Board
Please be aware that the base station uses three (3) identical receiver boards. As a result, the circuitry
will be described only once.
Front end. Incoming signals pass through a SAW filter (FLT1). The desired signals are amplified by U2
and additional selectivity is provided by a monolithic SAW filter (FLT2). Another amplifier (U1) further
amplifies the signal and the output pass through a matched pair of M
Monolithic filters (FLT4 and FLT5).
IF Amplifier
The incoming 45 MHz signal goes to U3 a super heterodyne IF subsystem. Inside the chip, the signal is
applied to a mixer. The mixer also accepts a 44.545 MHz local oscillator input. The local oscillator
consists of an internal amplifier, plus crystal (Y1) and associated components. The mixer output passes
through Y2, a 455 KHz ceramic IF filter. It is amplified, passed through ceramic filter (Y3), and on to a
second IF stage. The IF output drives a quadrature detector. The phase shift elements for the detector
are C29 and FLT3. The recovered audio appears at pin 9, while RSSI appears at pin 7.
Within the RSSI circuitry, chip U3 uses a detector, which converts the AGC voltage generated inside the
chip into a DC level corresponding logarithmically to signal strength. RSSI is used by Diversity Reception
on the System Controller to select the receiver with the highest quality signal.
A filter consisting of a resistor (R14) and a capacitor (C32) provides high frequency de-emphasis for the
audio. The audio is buffered by op amp U4A. From there the AUDIO output line goes to a connector, for
hookup to Diversity Reception on the System Controller Board.
Resistor (R15) and capacitor (C33) provides RF filtering for the DC RSSI voltage. The RSSI is buffered
by op amp U4B. From there the RSSI output line goes to a connector, for hookup to Diversity Reception
on the System Controller Board.
Several sets of 455 KHz IF filters (Y2 and Y3) are available to suit receiver selectivity requirements.
Should replacement of these filters be required, exact replacement parts must be used.