User Manual
SECTION 1: THEORY OF OPERATION
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Power and Analog Ground
These sections consist of the power supplies and transmit control circuitry. Power from the vehicle’s
battery appears at VBATT. A diode protects the voltage regulators by clamping any transient spikes on
the supply line. Such spikes typically occur while the engine is started. The supply line powers a series
of voltage regulators and the transmitter control circuitry, as follows:
Voltage regulator VR1 provides switched 9-volt power for most other sections in the radio.
Voltage regulator U21 powers the analog circuitry in the radio and is also switched on by the
microcontroller.
Voltage regulator VR2 provides a low noise 3.3-volt source for the synthesizer chip.
In the transmit control circuitry, to transmit, the microcontroller makes TXKEYOUT* high forcing the P-
channel device to conduct, applying 12-volts via PA12V to the transmitter power amplifier.
Receiver 2 Front-End
The circuitry for Receiver 2 is identical to Receiver 1.
Receiver 2 IF
This section is identical to the Receiver 1 IF.
Modem
The IP uses a single-chip modem circuit that converts serial data to an analog audio waveform for
transmission and analog audio from a receiver to serial data. In addition to the modem functions, the chip
provides forward error detection and correction, bit interleaving for more robust data communications, and
third generation collision detection and correction capabilities.
The microcontroller section controls the modem operation. Address bus, address/data bus, and control
lines operate the modem chip. The modem circuitry is also run by a crystal-controlled clock, which
consists of crystal Y1 and an internal Pierce oscillator.
Incoming audio from the baseband routing circuit appears on the DIVAUDIO input. The audio signal is
demodulated into digital data appearing on the AD0-AD7 lines when the MODEMCS* and RD* lines are
low. The data goes to the microcontroller section for further processing, and then to the input/output
section for conversion to RS232 signal levels. At this point, the received data is available to the user’s
MDC and VIU.
During a transmission, outgoing data appearing on the AD0-AD7 lines is converted into a 4-level FSK
audio signal by the modem chip. This operation takes place when the MODEMCS* and WR* lines are
low. Data from the user’s MDC or VIU passes through the input/output section and microcontroller
section to the AD0-AD7 bus. After processing, data passes through a root raised cosine filter and is
output to TXMOD.
This modem supports 115.2 KBPS (serial port) and 19.2 KBPS (over-the-air) data transmission rates.