Datasheet

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IRLR/U120NPbF

HEXFET

Power MOSFET

DSS

= 100V

DS(on)

= 0.185Ω

= 10A

Description

12/6/04

Parameter Max. Units

@ T

= 25°C Continuous Drain Current, V

@ 10V 10

@ T

= 100°C Continuous Drain Current, V

@ 10V 7.0 A

Pulsed Drain Current  35

= 25°C Power Dissipation 48 W

Linear Derating Factor 0.32 W/°C

Gate-to-Source Voltage ± 16 V

Single Pulse Avalanche Energy 85 mJ

Avalanche Current 6.0 A

Repetitive Avalanche Energy 4.8 mJ

dv/dt Peak Diode Recovery dv/dt  5.0 V/ns

Operating Junction and -55 to + 175

STG

Storage Temperature Range

Soldering Temperature, for 10 seconds 300 (1.6mm from case )

°C

Absolute Maximum Ratings

Parameter Typ. Max. Units

θJC

Junction-to-Case ––– 3.1

θJA

Junction-to-Ambient (PCB mount) ** ––– 50 °C/W

θJA

Junction-to-Ambient ––– 110

Thermal Resistance

D-PAK

TO-252AA

I-PAK

TO-251AA

l Surface Mount (IRLR120N)

l Straight Lead (IRLU120N)

l Advanced Process Technology

l Fast Switching

l Fully Avalanche Rated

Fifth Generation HEXFETs from International Rectifier

utilize advanced processing techniques to achieve the

lowest possible on-resistance per silicon area. This

benefit, combined with the fast switching speed and

ruggedized device design that HEXFET Power

MOSFETs are well known for, provides the designer

with an extremely efficient device for use in a wide

variety of applications.

The D-PAK is designed for surface mounting using

vapor phase, infrared, or wave soldering techniques.

The straight lead version (IRFU series) is for through-

hole mounting applications. Power dissipation levels

up to 1.5 watts are possible in typical surface mount

applications.

PD - 95082A

www.irf.com 1

l Lead-Free

Summary of content (10 pages)

PAGE 1
PD - 95082A IRLR/U120NPbF l l l l l l Surface Mount (IRLR120N) Straight Lead (IRLU120N) Advanced Process Technology Fast Switching Fully Avalanche Rated Lead-Free HEXFET® Power MOSFET D RDS(on) = 0.185Ω G Description ID = 10A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area.
PAGE 2
IRLR/U120NPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp.
PAGE 3
IRLR/U120NPbF 100 100 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 10 1 2.5V 20µs PULSE WIDTH T J = 25°C 0.1 0.1 1 10 A 10 2.5V 1 3.0 and R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25°C TJ = 175°C 1 VDS = 50V 20µs PULSE WIDTH 4 6 8 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10 A 100 Fig 2. Typical Output Characteristics 100 0.1 1 VDS , Drain-to-Source Voltage (V) Fig 1.
PAGE 4
IRLR/U120NPbF Ciss 600 15 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd V GS , Gate-to-Source Voltage (V) C, Capacitance (pF) 800 Coss Crss 0 1 10 V DS = 80V V DS = 50V V DS = 20V 12 400 200 I D = 6.0A 100 A 9 6 3 FOR TEST CIRCUIT SEE FIGURE 13 0 0 VDS , Drain-to-Source Voltage (V) 15 20 A 25 Fig 6. Typical Gate Charge Vs.
PAGE 5
IRLR/U120NPbF 10 V DS VGS ID, Drain Current (Amps) 8 D.U.T. RG 6 RD + -VDD 5.0V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 4 Fig 10a. Switching Time Test Circuit 2 VDS 90% A 0 25 50 75 100 125 150 175 TC , Case Temperature (°C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1.
PAGE 6
15V L VDS D.U.T RG IAS 10V tp DRIVER + V - DD A 0.01Ω Fig 12a. Unclamped Inductive Test Circuit EAS , Single Pulse Avalanche Energy (mJ) IRLR/U120NPbF 200 TOP BOTTOM 160 ID 2.4A 4.2A 6.0A 120 80 40 0 25 V(BR)DSS 50 75 100 125 150 Starting TJ , Junction Temperature (°C) tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 5.0 V QGS D.U.T.
PAGE 7
IRLR/U120NPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • • • • Driver Gate Drive Period P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test D= - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T.
PAGE 8
IRLR/U120NPbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: T HIS IS AN IRFR120 WITH AS S EMBLY LOT CODE 1234 AS S EMBLED ON WW 16, 1999 IN THE AS S EMBLY LINE "A" PART NUMBER INTERNATIONAL RECTIFIER LOGO Note: "P" in as sembly line pos ition indicates "Lead-Free" IRFU120 12 916A 34 AS S EMBLY LOT CODE DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A OR INT ERNAT IONAL RECT IFIER LOGO PART NUMBER IRFU120 12 AS S EMBLY LOT C
PAGE 9
IRLR/U120NPbF I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information EXAMPLE: T HIS IS AN IRFU120 WIT H AS S EMBLY LOT CODE 5678 AS S EMBLED ON WW 19, 1999 IN T HE AS S EMBLY LINE "A" INT ERNAT IONAL RECT IFIER LOGO PART NUMBER IRF U120 919A 56 78 AS S EMBLY LOT CODE Note: "P" in assembly line position indicates "Lead-Free" DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A OR INT ERNAT IONAL RECT IFIER LOGO PART NUMBER IRFU120 56 AS S EMBLY LOT
PAGE 10
IRLR/U120NPbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.