User Manual

Iridium Communications, Inc. Information Contained in this Guide
Iridium 9523 Product Developers’ Guide is Subject to Change Without Notice
Revision 2.6
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It is possible to produce VBOOST in other ways, particularly if the FA has a convenient supply rail that
has high enough voltage and current capacity. Table 8 shows the permissible limits for any VBOOST
supply.
Table 8: VBOOST Specification
Parameter Value
Absolute maximum voltage
(limited by capacitor rating)
35V
Maximum recommended voltage 32V
Minimum voltage when capacitors are charged 27V
Minimum voltage when enabled
(limited by minimum input to buck converter to produce PA power rail)
10.5V
Maximum current into VBOOST pins
(limited by rating of inter-board connector)
1A
Maximum power taken by buck converter
(during transmit time-slot)
30W
The maximum average power requirement over a 90ms period is 3.1W. The capacitors discharge to
typically 15V during the transmit burst when operating at maximum power. A typical design would have a
power limit of between 5 and 6 Watts (current approximately 0.25 Amp) so that the reservoir capacitors
are replenished in approximately half the allowed time.
If the boost voltage at the start of the transmit burst is below the minimum (27V) then the capacitors may
discharge to below 9.5V, in which case the transmitter power will reduce.
There is a residual VBAT current of about 70mA all the time that the Iridium 9523 is switched on, even
when not in a call. Periodically, the Iridium 9523 will draw about 250mA from the VBAT rail for about
20ms, as it maintains synchronization with the signal from the satellites.
When an Iridium call is in progress, there are two peaks in the current drawn by the VBAT rail in each
90ms frame – one of about 300mA during the transmit time-slot and a slightly smaller one, 250mA, during
the receive time-slot.
At the start of each of period when the receiver or transmitter is active a burst of current will be drawn, as
the radio circuitry switches on. This current is caused by the charging of six 4.7μF capacitors on the
outputs of internal voltage regulators.
3.3 PCM Digital Audio
The Iridium 9523 has two 15-bit linear PCM digital audio ports, though only one of these can be in use at
any time. The active port is selected using the AT+CAR command. This setup allows the FA board to
provide two parallel audio paths and switch between them through software instead of hardware. The two
ports have identical signals and timing, as shown in Figure 9. The PCM clock and sync signals are
outputs from the Iridium 9523.
The PCM clock signal has a frequency of 2048 kHz with an accuracy of 1 ppm, but it is derived from an
internal clock source by a fractional divider so each clock high period and low period is either 238.1 ns or
297.6 ns.
The PCM clock, sync and data signal outputs are all timed from the same internal clock and are skewed
by less than 1 ns (at equal load).