Microprocessor User's Manual

User’s Manual 145
10. I/O BANK CONTROL REGISTERS
The pins of Port E can be set individually to be I/O strobes. Each of the eight possible I/O
strobes has a control register that controls the nature of the strobe and the number of wait
states that will be inserted in the I/O bus cycle. Writes can also be suppressed for any of
the strobes. The types of strobes are shown in Figure 10-1. Each of the eight I/O strobes is
active for addresses occupying 1/8th of the 64K external I/O address space.
Figure 10-1. External I/O Bus Cycles
ADDR
T1 Tw T2
write data
write strobe
read data
read strobe
chip select strobe
valid
valid
valid
External I/O Timing (with 1 wait state)