Microprocessor User's Manual

User’s Manual 217
Figure 16-2 and Figure 16-3 illustrate the memory read and write cycles. The Rabbit 3000
operates at 2 clocks per bus cycle plus any wait states that might be specified.
Figure 16-2. Memory Read and Write Cycles
T
adr
T
adr
Memory Read (no wait states)
CLK
A[19:0]
Memory Write (no extra wait states)
CLK
A[19:0]
valid
T1
T2
T1
Tw
T2
valid
T
OEx
T
OEx
D[7:0]
valid
T
hold
T
setup
/CSx
/OEx
T
CSx
T
CSx
valid
D[7:0]
T
DHZV
T
DVHZ
/CSx
/WEx
T
CSx
T
CSx
T
WEx
T
WEx