User Guide

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system memory usually discusses their memory requirements. The settings are: Enabled and
Disabled.
3-6-1 DRAM Timing Setting
CMOS Setup Utility – Copyright(C) 1984-2000 Award Software
DRAM Timing Setting
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RAS Active Time 6T
RAS Precharg Time 3T
RAS to CAS Delay 3T
Early CKE Delay Adjustment Auto
Early CKE Delay 1T Control Normal
Write Recovery Time 2T
Background Command Lead-off Time Delay 1T
Read/Write Cycles Lead-off Time Delay 1T
CAS Latency Auto
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RAS Active Time
Select the number of SCLKs for an access cycle. The settings are: Auto (Default), 6T, 7T, 5T,
4T.
RAS Precharge Time
If an insufficient number of cycles is allowed for the RAS to accumulate its charge before
DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain date. Fast
gives faster performance; and Slow gives more stable performance. This field applies only
when synchronous DRAM is installed in the system. The settings are: Auto (default), 4T, 2T
and 3T.
RAS to CAS Delay
This field let’s you insert a timing delay between the CAS and RAS strobe signals, used when
DRAM is written to, read from, or refreshed. Fast gives faster performance; and Slow gives
more stable performance. This field applies only when synchronous DRAM is installed in the
system. The settings are: 2 and 3.
CAS Latency
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends
on the DRAM timing. The settings are: Auto (Default) 2T and 3T.
3-6-2 AGP Function Settings