Data Sheet

Part number:WG7837-V1
Model name :WG7837-V0
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CONFIDENTIAL
Table 6-1. SDIO Default Timing Characteristics
(1)
PARAMETER
(2)
MIN MAX UNIT
f
clock
Clock frequency, CLK 0.0 26.0 MHz
DC Low/high duty cycle 40.0 60.0 %
t
TLH
Rise time, CLK 10.0 ns
t
THL
Fall time, CLK 10.0 ns
t
ISU
Setup time, input valid before CLK↑ 3.0 ns
t
IH
Hold me, input valid aer CLK↑ 2.0 ns
t
ODLY
Delay me, CLK↓ to output valid 7.0 10.0 ns
C
I
Capacitive load on outputs 15.0 pF
(1) To change the data out clock edge from the falling edge (default) to the rising edge, set the configuration bit.
(2) Parameter values reflect maximum clock frequency.
SDIO Switching Characteristics – High Rate
Figure 6-3. SDIO HS input timing