Projector Service Manual
Table Of Contents
- DECLARATION OF CONFORMITY
- BZSAFE.PDF
- CH1INTRO.PDF
- CH2SYSDE.PDF
- Functional Descriptions
- Contents
- Cover and Base
- External Power Requirements
- Electronics Systems Overview
- System Power
- Card Cage
- Circuit Boards
- Raster Timing Generator Board (RTG) p/n 100568
- Sync Generator
- Sync Detector and Selector
- Serration and Equalization Lockout
- Phase Locked Loop
- VSYNC Detector, Field Separator, and Mux
- Adjustment Counters
- Serial Communication
- Raster Timing Generator I/O
- Interlocks and Protection
- Horizontal Deflection Board P/N 102523 (HDB)
- Vertical Oscillator
- Horizontal Phase Locked Loop
- Horizontal Centering
- Horizontal Power Supply
- Flyback Switching
- Geometric Correction
- Output Section
- Horizontal Sweep Failure Detection
- Serial Communication
- Horizontal Deflection Board I/O
- Interlocks and Protection
- Vertical Deflection Board P/N 102521(VDB)
- Vertical Preamps
- Vertical Amplifiers
- Sweep Failure Detection
- Side Pincushion and Keystone Correction
- Horizontal Linearity Correction
- Top and Bottom Pincushion and Keystone Correction
- Correction Amplifiers
- Serial Communication
- General I/O
- Interlocks and Shutdowns
- Video Processor Board P/N 104672 (VPB)
- Decoder
- Video/Sync Mux
- V & H Sync Strip
- SG Sync Strip
- B, G, and R Brightness and Contrast Amplifiers
- On-Screen Switch
- Gamma Correction
- Switch Logic and Video Enable
- RGB Sensitivity and Threshold Amplifier
- ILA® Bias
- Dynamic Focus Amplifier
- Serial Communication
- General I/O
- Interlocks and Protection
- Video Amplifier Board P/N 103567 or 103774 (VAB)
- Video Signal
- Failure Detection
- Beam Current Sense
- DC Restore
- Arc Protection
- Blanking
- Enable Circuit
- Focus
- Filament Supply
- General I/O
- System Controller Board P/N 104668 (SCB)
- General Functional Description
- CPU
- Working and Compressed Memory
- Expanded Memory
- Correction Address Generator
- DACs
- DSP
- Overlay Memory
- Overlay Address Generator
- Overlay Interface
- LED Display Buffers and Logic
- RS232 Interface
- IR Interface
- IIC Interface
- Serial Interface
- General I/O
- Backplane Board p/n 100571
- Optical Section
- Image Light Amplifier
- Functional Descriptions
- CH3ADJST.PDF
- CH4MAINT.PDF
- Maintenance Remove/Replace)
- Contents
- Introduction
- Projector Covers
- Ventilation Filters
- Arc Lamp Assembly
- System Power Supply
- Electronics Module
- Cathode Ray Tube (CRT)
- Video Amplifier Board (VAB)
- CRT Yoke
- High Voltage Power Supply (HVPS)
- Card Cage (Printed Circuit Boards)
- Image Light Amplifier Assembly
- Projection Lens
- (SCB) Socket Battery Replacement
- Recommended Spares
- Maintenance Remove/Replace)
- CH5TRBSH.PDF
- HGLOSS.PDF
Chapter 2—Functional Description
Model 330, 340SC and 370SC Service Manual 2-29
The three (3) horizontal deflection coils (B, G, and R) are driven in parallel by a single
drive circuit and transistor. This is the reason for the inability to remotely control the
three (3) raster widths independently. Since the deflection coils are in parallel, it is
imperative that they all be connected prior to applying sweep voltage—the interlock
circuit ensures this. An output from the Horizontal Power Supply is sent, in series,
through all three (3) yoke connectors. This is part of the bias voltage used to operate the
base drive circuit for the output section. Thus, if any of the yoke connectors is not
connected, the output transistor will not turn on, and no horizontal sweep will be present.
There are two (2) output jumpers on the board, J500 and J501. Their function is to
reverse the direction of the current through the horizontal deflection coils for front and
rear projection. The output cable shall be connected to J501 for rear projection and J500
for front projection (Jumper Settings, Section 3.9).
Horizontal Sweep Failure Detection
Protection of the CRT from spot burns is accomplished by never allowing the CRT to
continue to have beam current when there is no deflection. To this end, the HDB has a
sensing circuit that detects when there is a loss of sweep that may cause CRT damage.
This circuit senses the horizontal flyback voltage and frequency. By sensing both
amplitude and frequency, the projector is able to maintain sweep over the widely varying
input conditions allowed and still protect the CRTs from damage. The flyback signal is
AC coupled and peak detected, then compared with a reference. As long as the flyback
amplitude and frequency are above the minimum allowed, the sweep detection outputs
(HSENSBLU, HSENSGRN, and HSENSRED) are pulled high. These signals are sent to
the VDB for processing.
Serial Communication
The HDB uses two (2) separate, interrelated serial data communication systems to
communicate with the SCB; the IIC bus, and a differential, synchronous data bus. The
information transferred over the serial busses is indicated below (I = input to HDB, O =
output from HDB). Also noted is whether the information is transferred over the IIC or
the serial bus. A change in output data generates an interrupt pulse.
Table 2-6
HDB Serial BUS Information
Bus
I/O
Information
Description
IIC
I
Flyback switch select
Two bits that select one of four flyback switching
times (see detailed description)
IIC
I
Flyback switch pulse
Pulse signal that commands the flyback relays to
switch.
IIC
O
Front/Rear indication
TTL level that indicates whether the projector is
in front screen mode (high) or rear screen
(pulled low).
IIC
O
Floor/Ceiling
indication
TTL level that indicates whether the projector is
in the upright mode (high) or inverted mode
(pulled low).