Datasheet

ManualsBrandsKEMET ManualsCapacitorsCeramic capacitor SMD 0402 4.7 nF 50 V 10 % (L x W x H) 1 x 0.3 x 0.5 mm 1 pc(s)

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Benets

• -55°C to +125°C operating temperature range

• Lead (Pb)-Free, RoHS, and REACH Compliant

• Temperature stable dielectric

• EIA 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825, 2220,

and 2225 case sizes

• DC voltage ratings of 6.3 V, 10 V, 16 V, 25 V, 35 V, 50 V, 100 V,

200 V, and 250 V

• Capacitanceofferingsrangingfrom10pFto47μF

• Available capacitance tolerances of ±5%, ±10%, and ±20%

• Non-polar device, minimizing installation concerns

• 100%puremattetin-platedterminationnishallowingfor

excellent solderability

• SnPbterminationnishoptionavailableuponrequest

(5% Pb minimum)

Applications

Typicalapplicationsincludedecoupling,bypass,lteringand

transient voltage suppression.

Overview

KEMET’s X7R dielectric features a 125°C maximum operating

temperatureandisconsidered“temperaturestable.”The

Electronics Components, Assemblies & Materials Association

(EIA)characterizesX7RdielectricasaClassIImaterial.

Componentsofthisclassicationarexed,ceramicdielectric

capacitors suited for bypass and decoupling applications or

forfrequencydiscriminatingcircuitswhereQandstabilityof

capacitancecharacteristicsarenotcritical.X7Rexhibitsa

predictablechangeincapacitancewithrespecttotimeand

voltageandboastsaminimalchangeincapacitancewith

referencetoambienttemperature.Capacitancechangeislimited

to ±15% from -55°C to +125°C.

SurfaceMountMultilayerCeramicChipCapacitors(SMDMLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Ordering Information

C 1206 C 106 M 4 R A C TU

Ceramic

Case Size

(L" x W")

Specication/

Series

Capacitance

Code (pF)

Capacitance

Tolerance

Rated Voltage

(VDC)

Dielectric

Failure Rate/

Design

Termination

Finish

Packaging/

Grade (C-Spec)

0402

0603

0805

1206

1210

1808

1812

1825

2220

2225

C = Standard Twosignicant

digits +

number of

zeros.

J = ±5%

K = ±10%

M = ±20%

9 = 6.3

8 = 10

4 = 16

3 = 25

6 = 35

5 = 50

1 = 100

2 = 200

A = 250

R = X7R A = N/A C = 100%

Matte Sn

See

“Packaging

C-Spec

Ordering

Options Table”

below

Flexible termination option is available. Please see FT-CAP product bulletin C1013_X7R_FT-CAP_SMD.

Additional termination nish options may be available. Contact KEMET for details.

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Summary of content (25 pages)

PAGE 1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Overview KEMET’s X7R dielectric features a 125°C maximum operating temperature and is considered “temperature stable.” The Electronics Components, Assemblies & Materials Association (EIA) characterizes X7R dielectric as a Class II material.
PAGE 2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Packaging C-Spec Ordering Options Table Packaging Type1 Packaging/Grade Ordering Code (C-Spec) Bulk Bag / Unmarked 7" Reel / Unmarked 7" Reel / Marked 7" Reel / Unmarked / 2 mm pitch2 13" Reel / Unmarked / 2 mm pitch2 Not required (Blank) TU TM 7081 7082 Default packaging is "Bulk Bag". An ordering code C-Spec is not required for "Bulk Bag" packaging.
PAGE 3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Qualification/Certification Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are referenced in Table 4, Performance & Reliability. Environmental Compliance Lead (Pb)-Free, RoHS, and REACH compliant without exemptions.
PAGE 4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Post Environmental Limits High Temperature Life, Biased Humidity, Moisture Resistance Dielectric Case Size 0402 0603 0805 X7R 1206 1210 1808-2225 Rated DC Voltage < 16 16 / 25 > 25 < 16 16 / 25 > 25 < 16 16 / 25 < 16 16 / 25 > 25 < 16 16 / 25 > 25 < 16 16 / 25 > 25 35 / 50 < 16 16 / 25 < 16 16 / 25 > 25 < 16 16 / 25 < 16 16 / 25 > 25 Capacitance Value All < 1.0 µF ≥ 1.0 µF < 2.
PAGE 5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Dissipation Factor (DF) Limit Table EIA Case Size 0402 0603 0805 1206 1210 1808-2225 Rated DC Voltage < 16 16 / 25 > 25 < 16 16 / 25 > 25 < 16 16 / 25 < 16 16 / 25 > 25 < 16 16 / 25 > 25 < 16 16 / 25 > 25 35 / 50 < 16 16 / 25 < 16 16 / 25 > 25 < 16 16 / 25 < 16 16 / 25 > 25 Capacitance All < 1.0 µF ≥ 1.0 µF < 2.2 µF < 1.0 µF ≥ 2.2 µF Dissipation Factor (Maximum %) 5.0 3.5 2.5 5.0 3.5 2.
PAGE 6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes) 2 A 250 1 100 5 200 6 50 3 25 4 35 8 16 9 10 A 6.3 2 250 1 200 5 50 6 C1206C 100 3 35 4 16 8 25 9 10 2 6.
PAGE 7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes) cont'd 6 5 1 2 A 250 3 100 4 200 8 50 9 25 A 35 2 16 1 10 5 6.3 10 6 250 6.3 3 200 200 4 50 8 C1206C 100 9 35 2 16 1 25 5 50 10 3 100 50 4 16 8 25 9 6.3 16 5 C0805C A 9 8 4 3 6 5 250 2 100 1 200 16 5 C0805C EH EH EH¹ EH¹ EH¹ 50 10 6 6.
PAGE 8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.
PAGE 9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.
PAGE 10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.
PAGE 11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Table 2A – Chip Thickness/Tape & Reel Packaging Quantities cont'd Plastic Quantity Paper Quantity1 Thickness Code Case Size1 Thickness ± Range (mm) 7" Reel 13" Reel 7" Reel 13" Reel HD HE HF JB JC JD JE JF JO KB KC KD KE 1825 1825 1825 2220 2220 2220 2220 2220 2220 2225 2225 2225 2225 1.30 ± 0.15 1.40 ± 0.15 1.50 ± 0.15 1.00 ± 0.15 1.10 ± 0.15 1.30 ± 0.15 1.40 ± 0.15 1.50 ± 0.15 2.
PAGE 12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351 EIA Size Code Metric Size Code Density Level A: Maximum (Most) Land Protrusion (mm) Density Level B: Median (Nominal) Land Protrusion (mm) Density Level C: Minimum (Least) Land Protrusion (mm) C Y X V1 V2 C Y X V1 V2 C Y X V1 V2 0402 1005 0.50 0.72 0.72 2.20 1.20 0.45 0.62 0.62 1.90 1.00 0.
PAGE 13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Soldering Process Recommended Soldering Technique: • Solder wave or solder reflow for EIA case sizes 0603, 0805 and 1206 • All other EIA case sizes are limited to solder reflow only Recommended Reflow Soldering Profile: KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual), convection, IR or vapor phase reflow techniques.
PAGE 14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Table 4 – Performance & Reliability: Test Methods and Conditions Stress Reference Test or Inspection Method Terminal Strength JIS–C–6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds. Board Flex JIS–C–6429 Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G. Flexible termination system – 3.0 mm (minimum). Magnification 50 X.
PAGE 15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Construction (Typical) Detailed Cross Section Dielectric Material (BaTiO3) Barrier Layer (Ni) Termination Finish (100% Matte Sn) Dielectric Material (BaTiO3) End Termination/ External Electrode (Cu) Inner Electrodes (Ni) End Termination/ External Electrode (Cu) Barrier Layer (Ni) Termination Finish (100% Matte Sn) Inner Electrodes (Ni) © KEMET Electronics Corporation • P.O.
PAGE 16
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Capacitor Marking (Optional): These surface mount multilayer ceramic capacitors are normally supplied unmarked. If required, they can be marked as an extra cost option. Marking is available on most KEMET devices but must be requested using the correct ordering code identifier(s).
PAGE 17
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Capacitor Marking (Optional) cont’d Alpha Character 9 A Capacitance (pF) For Various Alpha/Numeral Identifiers Numeral 0 1 2 3 4 0.1 10 10 100 1,000 10,000 B 0.11 1.1 11 110 1,100 11,000 C 0.12 12 12 120 1,200 12,000 D 0.13 13 13 130 1,300 E 0.
PAGE 18
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Tape & Reel Packaging Information KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on reeling quantities for commercial chips.
PAGE 19
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Figure 1 – Embossed (Plastic) Carrier Tape Dimensions P2 T T2 ØDo [10 pitches cumulative tolerance on tape ± 0.2 mm] Po E1 Ao F Ko B1 E2 Bo S1 W P1 T1 Center Lines of Cavity ØD 1 Cover Tape B 1 is for tape feeder reference only, including draft concentric about B o.
PAGE 20
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Figure 2 – Punched (Paper) Carrier Tape Dimensions P2 T Po ØDo [10 pitches cumulative tolerance on tape ± 0.
PAGE 21
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Packaging Information Performance Notes 1. Cover Tape Break Force: 1.0 Kg minimum. 2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be: Tape Width Peel Strength 8 mm 0.1 to 1.0 Newton (10 to 100 gf) 12 and 16 mm 0.1 to 1.3 Newton (10 to 130 gf) The direction of the pull shall be opposite the direction of the carrier tape travel.
PAGE 22
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Figure 6 – Reel Dimensions Full Radius, See Note W3 (Includes Access Hole at Slot Location (Ø 40 mm minimum) flange distortion at outer edge) W2 (Measured at hub) D A (See Note) N C (Arbor hole diameter) B (see Note) W1 (Measured at hub) If present, tape slot in core for tape start: 2.5 mm minimum width x 10.
PAGE 23
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.
PAGE 24
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) KEMET Corporation World Headquarters Europe Asia Southern Europe Sasso Marconi, Italy Tel: 39-051-939111 Northeast Asia Hong Kong Tel: 852-2305-1168 Mailing Address: P.O. Box 5928 Greenville, SC 29606 Skopje, Macedonia Tel: 389-2-55-14-623 Shenzhen, China Tel: 86-755-2518-1306 www.kemet.
PAGE 25
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade) Disclaimer All product specifications, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for checking and verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.