Datasheet

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Automotive Grade)

Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351

EIA

Size

Code

Metric

Size

Code

Density Level A:

Maximum (Most)

Land Protrusion (mm)

Density Level B:

Median (Nominal)

Land Protrusion (mm)

Density Level C:

Minimum (Least)

Land Protrusion (mm)

C Y X V1 V2 C Y X V1 V2 C Y X V1 V2

0402 1005 0.50 0.72 0.72 2.20 1.20 0.45 0.62 0.62 1.90 1.00 0.40 0.52 0.52 1.60 0.80

0603 1608 0.90 1.15 1.10 4.00 2.10 0.80 0.95 1.00 3.10 1.50 0.60 0.75 0.90 2.40 1.20

0805 2012 1.00 1.35 1.55 4.40 2.60 0.90 1.15 1.45 3.50 2.00 0.75 0.95 1.35 2.80 1.70

1206 3216 1.60 1.35 1.90 5.60 2.90 1.50 1.15 1.80 4.70 2.30 1.40 0.95 1.70 4.00 2.00

1210 3225 1.60 1.35 2.80 5.65 3.80 1.50 1.15 2.70 4.70 3.20 1.40 0.95 2.60 4.00 2.90

1210

3225 1.50 1.60 2.90 5.60 3.90 1.40 1.40 2.80 4.70 3.30 1.30 1.20 2.70 4.00 3.00

1812 4532 2.15 1.60 3.60 6.90 4.60 2.05 1.40 3.50 6.00 4.00 1.95 1.20 3.40 5.30 3.70

2220 5650 2.75 1.70 5.50 8.20 6.50 2.65 1.50 5.40 7.30 5.90 2.55 1.30 5.30 6.60 5.60

Only for capacitance values ≥ 22 µF

Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reow

solder processes. KEMET only recommends wave soldering of EIA 0603, 0805, and 1206 case sizes.

Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reow solder processes.

Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform

qualication testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).

Image below based on Density Level B for an EIA 1210 case size.

C C

X X

Grid Placement Courtyard