User's Manual
ReVolution User Manual 1.00  06/09/03  71 
Test Points and Beep Codes 
At the beginning of each POST routine, the BIOS outputs the test point error code to I/O address 80h. Use this code 
during trouble shooting to establish at what point the system failed and what routine was being performed. The 
following is a list of the checkpoint codes written at the start of each test and the beep codes issued for terminal 
errors. Unless otherwise noted, these codes are valid for PhoenixBIOS 4.0 Release 6.x. 
Code
Beeps
Description
02h 
Verify Real Mode 
03h 
Disable Non-Maskable Interrupt (NMI) 
04h 
Get CPU type 
06h 
Initialize system hardware 
07h 
Disable shadow and execute code from the ROM. 
08h 
Initialize chipset with initial POST values 
09h 
Set IN POST flag 
0Ah 
Initialize CPU registers 
0Bh 
Enable CPU cache 
0Ch 
Initialize caches to initial POST values 
0Eh 
Initialize I/O component 
0Fh 
Initialize the local bus IDE 
10h 
Initialize Power Management 
11h 
Load alternate registers with initial POST values 
12h 
Restore CPU control word during warm boot 
13h 
Initialize PCI Bus Mastering devices 
14h 
Initialize keyboard controller 
16h 1-2-2-3  BIOS ROM checksum 
17h 
Initialize cache before memory Auto size 
18h 
8254 timer initialization 
1Ah 
8237 DMA controller initialization 
1Ch 
Reset Programmable Interrupt Controller 
20h 1-3-1-1  Test DRAM refresh 
22h 1-3-1-3  Test 8742 Keyboard Controller 
24h 
Set ES segment register to 4 GB 
28h 
Auto size DRAM 
29h 
Initialize POST Memory Manager 
2Ah 
Clear 512 kB base RAM 
2Ch 1-3-4-1  RAM failure on address line xxxx* 
2Eh 1-3-4-3  RAM failure on data bits xxxx* of low byte of memory bus 
2Fh 
Enable cache before system BIOS shadow 
32h 
Test CPU bus-clock frequency 
33h 
Initialize Phoenix Dispatch Manager 
36h 
Warm start shut down 
38h 
Shadow system BIOS ROM 
3Ah 
Auto size cache 
3Ch 
Advanced configuration of chipset registers 
3Dh 
Load alternate registers with CMOS values 
41h 
Initialize extended memory for RomPilot 
42h 
Initialize interrupt vectors 
45h 
POST device initialization 
46h 2-1-2-3  Check ROM copyright notice 
47h 
Initialize I20 support 
48h 
Check video configuration against CMOS 
49h 
Initialize PCI bus and devices 
4Ah 
Initialize all video adapters in system 
4Bh 
QuietBoot start (optional) 
4Ch 
Shadow video BIOS ROM 
4Eh 
Display BIOS copyright notice 
4Fh 
Initialize MultiBoot 










