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Document Revision 1.6

Document ID: AT8404

Issue Date: 16 March, 2010

AT8404

Summary of content (132 pages)

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» Kontron User's Guide « AT8404 Document Revision 1.6 Document ID: AT8404 Issue Date: 16 March, 2010 If it's embedded, it's Kontron. www.kontron.
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Revision History Rev. Index Brief Description of Changes Date of Issue 1.0 Initial Issue 9 January, 2008 1.1 Rework on chapter 4 ( Software description) and chapter 1.3 (Software 29 February, 2008 support), add chapter 3.2 (RTM8030) 1.2 Added Note in chapter 3.2 2 December, 2008 1.3 Rework covering SW update for FASTPATH 5.2 and WindRiver PNE 2.0 15 May, 2009 1.4 Pre-Release with major Rework in chapter 4 25 September, 2009 1.5 New Kontron outfit, chapter 4.5 and 4.
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Table of Contents Revision History .................................................................................................................. ii Customer Service ................................................................................................................ ii Proprietary Note ...............................................................................................................viii Trademarks ..................................................................................
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3.2 RTM8030 ........................................................................................................... 38 3.2.1 Hot Swap ..................................................................................................... 39 3.2.2 Unit Computer RS232 Management Interface ....................................................... 39 3.2.3 Unit Computer Fast Ethernet Management Interface .............................................. 40 3.2.4 GbE Port ...........................................
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List of Tables Table 1-1: Table 1-2: Table 1-3: Table 3-1: Table 3-2: Table 3-3: Table 3-4: Table 3-5: Table 3-6: Table 3-7: Table 3-8: Table 3-9: Table 3-10: Table 3-11: Table 3-12: Table 3-13: Table 3-14: Table 3-15: Table 3-16: Table 3-17: Table 3-18: Table 3-20: Table 3-19: Table 3-21: Table 3-22: Table 3-23: Table 3-24: Table 3-25: Table 4-1: Table 4-2: Table 4-3: Table 4-4: Table 4-5: Table 4-6: Table 4-7: Table 4-8: Table 4-9: Table 4-10: AMC Slot Options ...........................................
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Table 4-11: Table 4-12: Table 4-13: Table 4-14: Table 4-15: Table 4-16: Table 4-17: Table 4-18: Table 4-19: Table 4-20: Table 4-21: Table 4-22: Table 4-23: Table 5-1: Kontron FRU over current sensor .............................................................................65 Kontron FRU Power Denied sensor ...........................................................................65 Kontron reset sensor ...........................................................................................
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List of Figures Figure 3-1: Figure 3-2: Figure 3-3: Figure 3-4: Figure 4-1: Figure 4-2: Figure 4-3: Figure 4-4: Figure 4-5: Figure 5-1: Figure 5-2: Figure 5-3: Functional Block Diagram Base Board......................................................................... 19 Front Panel of AT8404............................................................................................. 36 SAS Port Mapping...................................................................................................
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Preface Proprietary Note This document contains information proprietary to Kontron AG. It may not be copied or transmitted by any means, disclosed to others, or stored in any retrieval system or media without the prior written consent of Kontron AG or one of its authorized agents. The information contained in this document is, to the best of our knowledge, entirely correct.
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Preface Explanation of Symbols CAUTION This symbol and title indicate potential damage to hardware and tells you how to avoid the problem. CAUTION Electric Shock This symbol and title warn of hazards due to electrical shocks (> 60V) when touching products or parts of them. Failure to observe the precautions indicated and/or prescribed by the law may endanger your life/health and/or result in damage to your material.
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Preface For Your Safety Your new Kontron product was developed and tested carefully to provide all features necessary to ensure its compliance with electrical safety requirements. It was also designed for a long fault-free life. However, the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation.
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Preface Special Handling and Unpacking Instructions ESD Sensitive Device This symbol and title inform that electronic boards and their components are sensitive to static electricity. Therefore, care must be taken during all handling operations and inspections of this product, in order to ensure product integrity at all times. Do not handle this product out of its protective enclosure while it is not used for operational purposes unless it is otherwise protected.
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Preface General Instructions on Usage In order to maintain Kontron’s product warranty, this product must not be altered or modified in any way. Changes or modifications to the device, which are not explicitly approved by Kontron AG and described in this manual or received from Kontron’s Technical Support as a special handling instruction, will void your warranty. This device should only be installed in or connected to systems that fulfill all necessary technical and specific environmental requirements.
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Preface Two Year Warranty Kontron AG grants the original purchaser of Kontron’s products a TWO YEAR LIMITED HARDWARE WARRANTY as described in the following. However, no other warranties that may be granted or implied by anyone on behalf of Kontron are valid unless the consumer has the express written consent of Kontron AG. Kontron AG warrants their own products, excluding software, to be free from manufacturing and material defects for a period of 24 consecutive months from the date of purchase.
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Chapter 1 Introduction 1KTC5520/EATX www.kontron.
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Introduction 1. Introduction The Board described in this manual is designed for the Advanced Telecom Computing Architecture (AdvancedTCA® or ATCA) defined by the PCI Industrial Computer Manufacturers Group (PICMG). The main advantages of AdvancedTCA include high throughput, multi-protocol support, high-power capability, hot swappability, high scalability and integrated system management.
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Introduction • Supports 5 AMC GbE interfaces per AMC slot • Supports a 10/100/1000Base-T interfaces to the RTM • Supports a GbE connection to the unit computer for fast packet transfer 1.1.1.2 Fat Pipe Interconnect • AMC bays B1 and B2 as well as B3 and B4 are directly (copper) interconnected via AMC Fat Pipe ports 4-7 1.1.1.
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Introduction 1.1.1.8 RTM Connector • Support for 7 RTM lanes from each AMC • FE and RS232 (RJ45) management ports • 2x Storage connections • 1x GbE • 12V and 3V3 sus Supply Voltage connections • I²C support • JTAG and production I/O support 1.1.1.
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Introduction 1.1.3 Optional Accessories 1.1.3.1 AMC Up to four mid-size single width or up to two mid-size double width AMC bays for standard or custom AMCs are implemented. AMC slots can be equipped with a: • Processor-AMC • HDD-AMC as mass storage device for the Processor-AMC • Interface AMC, e.g. Quad GbE 1.1.3.2 RTM The Kontron RTM8030 provides an additional GbE switch port and out-of-band management access via Fast Ethernet or RS232.
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Introduction 1.
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Introduction Table 1-2: AT8404 Main Specifications AT8404 SPECIFICATIONS • Base channels 1 and 2: 1 x GbE (1000BASE-T) Backplane (Zone 2) • Fabric channels 1 and 2: 1 x 10 GbE (XAUI) Interfaces • Synchronization Clock: 2 x CLK 1/2/3 (A/B) • Update channels 0-3: APS Path • 7 generic RTM channels from each AMC Slot • 2 SAS/SATA/FC interfaces for mass storage RTM (Zone 3) • 1 GbE interface to front board switch • Serial port for Unit Computer management • Fast Ethernet for Unit Computer management Fro
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Introduction Table 1-2: AT8404 Main Specifications AT8404 SPECIFICATIONS Designed to meet or exceed the following: Humidity • Bellcore GR-63, Section 4.1 • Operating: 15%-90% (non-condensing) at 55°C (131°F) • Non-Operating: 5%-95% (non-condensing) at 40°C (104°F) Designed to meet or exceed the following: Altitude • Operating: 4000 m (13123 ft) • Non-operating: 15000 m (49212 ft) Designed to meet or exceed the following: • Bellcore GR-63, Section 4.
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Introduction 1.3 Software Support The following table contains information related to software supported by the AT8404. Table 1-3: AT8404 Software Specifications AT8404 SPECIFICATIONS • Reliable field upgrades for all software components • Dual boot images with roll-back capability General • Management via SNMP and Command Line Interface • System access via TELNET, SSH and serial line • Hot-Swap support (IPMI) • Hot-Plug support for AMC modules (IPMI) • Static link aggregation (IEEE 802.
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Introduction Table 1-3: AT8404 Software Specifications AT8404 Supported MIBS SPECIFICATIONS • Switching Package MIBs • RFC 1213 - MIB-II • RFC 1493 - Bridge MIB • RFC 1643 - Ethernet-like -MIB • RFC 2233 - The Interfaces Group MIB using SMI v2 • RFC 2618 - RADIUS Authentication Client MIB • RFC 2674 - VLAN & Ethernet Priority MIB • RFC 2819 - RMON Groups 1,2,3 & 9 • RFC 3291 - Textual Conventions for Internet Network Addresses • IANA-ifType-MIB • IEEE 802.1X MIB (IEEE8021-PAE-MIB) • IEEE 802.
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Chapter 2 Installation 11KTC5520/EATX www.kontron.
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Installation 2. Installation The AT8404 has been designed for easy installation. However, the following standard precautions, installation procedures, and general information must be observed to ensure proper installation and to preclude damage to the board, other system components, or injury to personnel. 2.1 Safety Requirements The following safety precautions must be observed when installing or operating the AT8404.
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Installation 2.2 AT8404 Initial Installation Procedures The following procedures are applicable only for the initial installation of the AT8404 in a system. Procedures for standard removal and hot swap operations are found in their respective chapters. To perform an initial installation of the AT8404 in a system proceed as follows: 1. Ensure that the safety requirements indicated in section 2.1. are observed.
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Installation 2.3 Standard Removal Procedures To remove the board proceed as follows: 1. Ensure that the safety requirements indicated in section 2.1. are observed. WARNING Care must be taken when applying the procedures below to ensure that neither the AT8404 nor system boards are physically damaged by the application of these procedures. 2. Unscrew the front panel retaining screws. 3. Lift the notch of the lower handle and pull the handle with the notch away from the faceplate until you feel a resistance.
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Installation 2.6 Quick Start This section gives instructions for (initially) accessing the CLI (Command Line Interface) of the AT8404 using either in-band access via the BI or the out-of-band management interfaces (serial port or Fast Ethernet) accessible from the front plate serial connector or via an appropriate RTM. The CLI is required for configuring the GbE switch, as well as the storage interconnect. 2.6.1 In-Band CLI Access The GbE switch on the AT8404 is pre-configured with a management VLAN.
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Installation 3. Wait for boot process to complete, i.e. until the console selection menu appears. b c ! r - connect Base Fabric console connect Custom Application console shell escape reset system 4. Type ’b’ to connect to the Base Fabric console. Connected to Base Fabric console Press ^X or ^V to get to menu again Base Fabric switching application release GA 2.00 starting (Unit 1)> User: 5. Log in as admin and enter privileged mode by typing ’enable’ (no passwords required by default).
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Installation 2.6.3 Storage Configuration The storage connection on Port 2 of AMC B4 is linked to AMC B2 (port 2) by default.
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Chapter 3 Hardware Description 18KTC5520/EATX www.kontron.
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Hardware Description 3. Hardware Description This chapter describes the board specific items of the AdvancedTCA AMC Carrier Board AT8404 consisting of the main assembly with the Power Mezzanine Module. Also described is the RTM8030 used for management access and I/O extension. 3.1 Base Board The base board is a PICMG 3.0 and 3.1 Option 9 compliant Carrier Board for AdvancedTCA shelves offering up to four mid-size AMC bays.
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Hardware Description The main building blocks of the base board are: • Ethernet Switch • Unit Computer and Memory • Fat Pipe Interconnect • Storage Interconnect • Synchronous Clock Distribution • AMC Bays with APS (Automatic Protection Switching) • IPMI • RTM Interface • Power Supply 3.1.
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Hardware Description Table 3-1: CLI ID GbE Switch Port Assignment (Continued) Speed Type Connection 0/21 1 GbE 100BaseTX Unit Computer 0/22 1 GbE Serdes RTM SFP 0/23 1 GbE 1000BaseT Base Channel 1 0/24 1 GbE 1000BaseT Base Channel 2 0/25 10 GbE XAUI Fabric Channel 1 0/26 10 GbE XAUI Fabric Channel 2 3.1.
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Hardware Description The front plate connector has the following pinning: Table 3-3: Pin Number Serial Port (J11) Pin Assignment Signal 1 N.C. 2 RXD 3 TXD 4 DTR 5 GND 6 DSR 7 RTS 8 CTS 9 N.C. 10 N.C. 10 1 The RS232 Management Interface uses the following pins of the ATCA Zone 3 connector: Table 3-4: RS232 Pins on RTM Connector J30 Pin Function B3 RXD A3 TXD 3.1.2.
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Hardware Description 3.1.3 Fat Pipe Interconnect AMC bays B1 and B2 as well as B3 and B4 are directly (copper) interconnected via AMC Fat Pipe ports 4-7, see following table.
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Hardware Description 3.1.5 Synchronous Clock Distribution An FPGA is the global clock distribution device on the carrier board. In conjunction with the Telecom Clock protection switch, the FPGA distributes all necessary Telecom Clocks to or from the AMCs and the backplane. TCLKA and TCLKC of any AMC can be driven by any backplane clock (CLK1A/B, CLK2A/B or CLK3A/B). TCLKB and TCLKD of any AMC can drive any backplane clock. Any ATCA backplane clock can be used as the reference clock input.
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Hardware Description Table 3-8: AMC B1 Port Assignment (Continued) Port Region Connection 20 Extended RTM, AMC_B1_P20 TCLKA Clock From Backplane TCLKB Clock To Backplane TCLKC Clock From Backplane TCLKD Clock To Backplane FCLKA Clock Fabric Reference Clock * Depends on configuration Table 3-9: AMC B2 Port Assignment Port Region Connection 0 GbE GbE Switch 0/10 1 GbE - 2 Storage AMC B4 Port 2 / -* 3 Storage RTM SAS_0 4 Fabric AMC B1 Port 4 5 Fabric AMC B1 Port 5
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Hardware Description Table 3-10: AMC B3 Port Assignment Port Region Connection 0 GbE GbE Switch 0/15 1 GbE - 2 Storage AMC B1 Port 2 3 Storage - 4 Fabric AMC B4 Port 4 5 Fabric AMC B4 Port 5 6 Fabric AMC B4 Port 6 7 Fabric AMC B4 Port 7 8 Fabric GbE Switch 0/11 9 Fabric GbE Switch 0/12 10 Fabric GbE Switch 0/13 11 Fabric GbE Switch 0/14 12 Extended Update, APS Channel 13 Extended RTM, AMC_B3_P13 14 Extended RTM, AMC_B3_P14 15 Extended RTM, AMC_B3_P15 17
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Hardware Description Table 3-11: AMC B4 Port Assignment Port Region Connection 0 GbE GbE Switch 0/20 1 GbE - 2 Storage AMC B1 Port 3 / AMC B2 Port 2* 3 Storage RTM SAS_1 4 Fabric AMC B3 Port 4 5 Fabric AMC B3 Port 5 6 Fabric AMC B3 Port 6 7 Fabric AMC B3 Port 7 8 Fabric GbE Switch 0/16 9 Fabric GbE Switch 0/17 10 Fabric GbE Switch 0/18 11 Fabric GbE Switch 0/19 12 Extended Update, APS Channel 13 Extended RTM, AMC_B4_P13 14 Extended RTM, AMC_B4_P14 15 Exten
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Hardware Description Gigabit Ethernet Port 0 and ports 8 to 11 of each AMC are connected to the Ethernet switch. The Ethernet switch supports 1000BASE-BX Gigabit Ethernet. Storage Ports 2 and 3 of the AMC slots are reserved for storage connections to other AMC bays or the RTM (see section 3.1.2. Storage Interconnect). PCI Express Bays B1 and B3 and bays B2 and B4 implement a x4 direct connection on ports 4 to 7. Automatic Protection Switching Port 12 on each AMC bay is used as a 2.
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Hardware Description The internal Flash memory of the IPMC is divided into two distinct parts, the IPMI firmware and the boot block. This allows maintaining a permanent boot block and only erasing the IPMI firmware for upgrade procedure. This is the key feature to achieve a fail-safe upgrade procedure. The IPMC executes normally the IPMI firmware located in its internal Flash memory. During an update, the IPMC transfers the new IPMI firmware to one of the two external menory banks.
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Hardware Description The Zone 3 connectors have the following pin assignments. Table 3-13: J30 J30 Assignment ROW A AB ROW B ROW C CD ROW D 1 12V GND 12V 12V GND 3V3_SUS 2 12V GND 12V 12V GND JTAG_AMC_EN# 3 SPA_RX# GND SPA_TX# JTAG_TDI GND JTAG_TDO 4 N.C. GND N.C. N.C. GND N.C. 5 RS232_TX1 GND N.C. RS232_TX2 GND N.C.
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Hardware Description Table 3-14: J31 J31 Assignment ROW A AB ROW B ROW C CD ROW D 1 N.C. GND N.C. N.C. GND N.C. 2 N.C. GND N.C. N.C. GND N.C. 3 N.C. GND N.C. N.C. GND N.C. 4 N.C. GND N.C. N.C. GND N.C. 5 N.C. GND N.C. N.C. GND N.C. 6 AMC_B1_P13_TX+ GND AMC_B1_P13_TX- AMC_B1_P13_RX+ GND AMC_B1_P13_RX- 7 N.C. GND N.C. N.C. GND N.C.
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Hardware Description Table 3-15: J32 J32 Assignment ROW A AB ROW B ROW C CD ROW D 1 N.C. GND N.C. N.C. GND N.C. 2 AMC_B2_P14_TX+ GND AMC_B2_P14_TX- AMC_B2_P14_RX+ GND AMC_B2_P14_RX- 3 N.C. GND N.C. N.C. GND N.C. 4 AMC_B3_P14_TX+ GND AMC_B3_P14_TX- AMC_B3_P14_RX+ GND AMC_B3_P14_RX- 5 AMC_B3_P17_TX+ GND AMC_B3_P17_TX- AMC_B3_P17_RX+ GND AMC_B3_P17_RX- 6 AMC_B3_P19_TX+ GND AMC_B3_P19_TX- AMC_B3_P19_RX+ GND AMC_B3_P19_RX- 7 N.C. GND N.C. N.C. GND N.C.
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Hardware Description 3.1.9.1 Power Connector The power connector supplies the board with two 48V redundant rails, digital ground and chassis ground. It also provides the redundant IPMB Shelf Manager connection. Table 3-16: Power Connector (P10) Signal Pin Pin Signal N.C. 1 2 N.C. N.C. 3 4 N.C. HA0 5 6 HA1 HA2 7 HA4 9 HA6 1 4 8 HA3 10 HA4 11 13 16 12 HA5 SCL_A 13 SDA_A 15 20 24 14 SCL_B 17 21 16 SDA_B MT1_TIP(N.C.) 17 MT2_TIP(N.C.) 19 26 18 RING_A(N.C.
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Hardware Description 3.1.9.5 Power Supply RTM The RTM has its own power supply. The 12V payload power is generated by a hot swap controller and for the management power a current limit switch is used. The maximum power dissipation for an RTM is 10W. For further details please refer the PICMG 3.0 standard. 3.1.9.6 Power Transients The board provides continuous operation in the presence of transients shown in the following table of the PICMG 3.
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Hardware Description Table 3-18: Jumper Settings ( • Default Setting) F_SPI_PROG FPGA Configuration Programming • Normal Operation in out RES_OVR Reserved in • Reserved out AMC_OVR IPMC AMC override in • Normal Operation out SHMC_OVR IPMC Shelf Manager override • Normal Operation in out JTAG_AMC_EN Enable JTAG on AMCs only • Full JTAG Chain in out JTAG_BDI_EN PPC Debug interface enable • Normal Operation in out TEST_ON IPMI Board activation override • Normal IPMI activation in out POWER
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Hardware Description 3.1.11 Front Panel Elements Figure 3-2: Front Panel of AT8404 AMC B1 ATCA LED1 (red/amber) displays „Out of Service“ ATCA LED2 (green/amber) displays „Healthy“ ATCA LED3 (amber/green), User defined AMC B2 RS232 Connector AMC B3 AMC B4 ATCA Blue LED The four front panel ATCA LEDs display the status of the board’s health. 36 AT8404 User Guide www.kontron.
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Hardware Description Table 3-19: Symbols Chart LED Table 3-20: Signification LED Activity ATCA LED3 (amber/green) Healthy ATCA LED2 (green/amber) Out of Service ATCA LED1 (red/amber) Hot Swap ATCA BLUE LED ATCA LEDs Signification LED ATCA LED3 (HB) (amber/green) Signification not used, can be controlled by application using PICMG API Off=Payload power down ON(green)=Health OK ATCA LED2 (HY) (green/amber) ON(amber)=Health error (Critical) Application defined=Can be controlled by applicatio
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Hardware Description 3.2 RTM8030 The RTM8030 is a single slot (6HP) ATCA Rear Transition Module. This RTM provides additional connectivity to the Kontron AT8030 CPU board and the AT8404 10G AMC Carrier board. This chapter describes the RTM features which are usable for the AT8404. For a general and AT8030 specific description, please refer to the RTM8030 User's Guide. Note... Not all of the front plate elements are used in combination with the AT8404. E.g.
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Hardware Description 3.2.1 Hot Swap The RTM8030 supports hot swapping by using the switch connected to the face plate lower ejector. The insertion or extraction procedure is identical to the ATCA AMC behaviour. The hot swap procedure is controlled by the RTM's Module Management Controller (MMC). 3.2.1.1 Inserting the RTM8030 into the slot The presence of the RTM is indicated by one signal. The front blade IPMC recognizes the RTM insertion when this signal is low.
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Hardware Description Connection to the RJ45 can be established with a straight through Ethernet cable and a RJ45 (female) to SubD (female) adapter if required. The adapter is described in the following table.
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Hardware Description Table 3-24: Fast Ethernet Management (RJ45) LEDs Signification Speed LED (Yellow) OFF 10BASE-T ON 100BASE-T Status LED (Green) OFF Link down ON Link up and no activity BLINK Link up and activity 3.2.4 GbE Port The SFP port is connected to the front board's GbE switch. The corresponding interface is identified as 0/22. The SFPs uplink ports are according the Small Form-factor Pluggable (SFP) Transceiver MultiSource Agreement (MSA), Sept. 14th, 2000.
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Hardware Description 3.2.5 SAS Channels An external x4 SAS/SATA connector provides access to two of the AT8404 AMC bays, See “Storage Interconnect” on page 23.. The connector is a SFF-8470 fixed (receptacle) shielded connector with jack screws. A SAS signal conditioner (repeater) and multiplexer is needed to guarantee SAS signal integrity over the cable between two RTM blades. The maximum SAS cable length between two RTM blades is 4m. SAS links work after both RTM units have been powered up.
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Hardware Description 3.2.7 Display Elements Figure 3-4: Front Panel of the RTM8030 4x External SAS Connector FE RJ45 Unit Computer FE Port: Upper LED (green) displays Link/Activity, lower LED (yellow) displays Speed RJ45 Unit Computer RS232 Interface RS232 SFP Gigabit Ethernet 43 AT8404 User Guide www.kontron.
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Chapter 4 Software Description 44KTC5520/EATX www.kontron.
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Software Description 4. Software Description Software on the AT8404 includes the following parts: • Bootloader • OS (rootFS, kernel) • Application SW • IPMI FW The Software accomplishes operation of the switching hardware and is therefore also referenced as firmware. It is pre-installed on the system and can only be updated by a dedicated update procedure. This manual only describes bootloader, its self tests and IMPI Firmware and introduces the update procedure.
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Software Description • GMRP – Dynamic L2 multicast registration: clause 10, 802.1D-2004 • GVRP – Dynamic VLAN registration: clause 11.2, 802.1Q-2003 • RFC 4541 – IGMP snooping and MLD snooping 4.1.1.
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Software Description • RFC 2868 – RADIUS attributes for tunnel protocol support • RFC 2869 – RADIUS extensions • rfc28869bis — RADIUS support for Extensible Authentication Protocol (EAP) • RFC 3164 – The BSD syslog protocol • RFC 3580 – 802.1X RADIUS usage guidelines 4.1.1.4 Switching MIBs (via Management Module) • IEEE 802.1X MIB (IEEE 802.1-PAE-MIB) • IEEE 802.
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Software Description • Permit/deny actions for inbound or outbound Layer 2 traffic classification based on: • Source MAC address • Destination MAC address • Ethertype • 802.1p user priority (outer and/or inner VLAN tag) • VLAN identifier value or range (outer and/or inner VLAN tag) • Optional rule attributes: • Assign matching traffic flow to a specific queue • Redirect or mirror (flow-based mirroring) matching traffic flow to a specific port • Generate trap log entries containing rule hit counts 4.1.2.
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Software Description • RFC 2295 – Transparent content negotiation • RFC 2296 – Remote variant selection; RSVA/1.
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Software Description 4.2 Bootloader On the AT8404 Carrier board, the bootloader ‘u-boot‘ (universal bootloader) is used. The bootloader initializes the main components of the board like CPU, SDRAM, serial lines etc. for operation. After this, kernel and application are started from Flash. 4.2.1 Power on self Test 4.2.1.1 Test Routines Upon power on or system reset, the bootloader performs a set of Power On Self Tests (POST) to check the integrity of specific components.
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Software Description Table 4-2: POST Boot Steps POST Step Code Value Boot Step PC_INIT 0x00 Initial PC, EBC has been set up PC_BINIT 0x01 Board early init (interrupt settings) PC_CLOCKS 0x02 Get system clocks PC_TIMEB 0x03 Init timebase PC_ENVINIT 0x04 Init environment PC_BAUD 0x05 Init baudrate PC_SERIAL 0x06 Init UART PC_CPU 0x07 Check CPU PC_PHY 0x08 Setup PHY PC_I2C 0x09 Init I2C PC_INITRAM 0x0A Init SDRAM controller and SDRAM PC_TESTRAM 0x0B Test SDRAM PC_INITS
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Software Description 4.2.2 Bootloader shell options The boot process can be interrupted by entering the bootstopkey “stop”. This will open a bootloader shell session. “?” provides a list of possible commands, “printenv” provides a list of environment settings. The bootloader shell can be used to customize boot options and system startup. CAUTION Changing bootloader environment variables must be taken very carefully. It will change system behaviour.
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Software Description Table 4-3: Bootloader environment variables (Continued) Name Description 0 – disable boot monitor watchdog (default) watchdogboot 5...n – timeout in seconds before boot monitor watchdog fires Note: This is the pBMWD watchdog 0 – disable OS load watchdog (default) watchdogos 15...
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Software Description 4.3 IPMI Firmware The Unit Computer communicates with the Intelligent Platform Management Controller (IPMC) using the Keyboard Controller Style (KCS) interface. The bootloader is able to communicate with the IPMC, e.g. for POST error logging purposes and fault resilient purposes. The memory subsystem of the IPMC consists of an integrated flash memory to hold the IPMC operation code and integrated RAM for data.
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Software Description Table 4-4: SDR ID 0 AT8404 sensors Name Sensor Type Code AT8404 Reading Type Code Description FRU Device locator Record (SDR type 0x11) - 0x24 1 IPMC Reboot 2 IPMI Watch- 0x23 dog (Watchdog 2) 3 IPMC Storage Err (Platform Alert) 0x24 (Platform Alert) 0x03 (Digital Discrete) Event Offset offset 0: event trigger, Normal Condition (IPMC is running) Generates an event offset 1: event trigger, IPMC when the IPMC starts or has reboot reboots see IPMI v1.5 table 36.
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Software Description Table 4-4: SDR ID AT8404 sensors (Continued) Name Sensor Type Code Reading Type Code Description Event Offset offset 0/event data 2: 00h (unspecified): event trigger, A Boot monitor POST failure 9 PPC POST Error 0x0F (System Firmware Progress) 0x6F Generates an event (Sensor Spe- when a POST error occurred cific) offset 0/event data 2: 0Bh (Firm. corruption. ): event trigger, Boot monitor backup image loaded/ Primary boot monitor corrupted see IPMI v1.5 table 36.
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Software Description Table 4-4: SDR ID AT8404 sensors (Continued) Name Sensor Type Code 0xF0 Reading Type Code Description Event Offset 0x6F (PICMG Hot Swap) PICMG hotswap sensor (Sensor Spe- for AMC B2 cific) see PICMG 3.0R2.0 section 3.2.4.3 for event trigger and sensor definition 0xF0 0x6F (PICMG Hot Swap) PICMG hotswap sensor (Sensor Spe- for AMC B3 cific) see PICMG 3.0R2.0 section 3.2.4.
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Software Description Table 4-4: SDR ID AT8404 sensors (Continued) Name Sensor Type Code Reading Type Code Description 0x6F Generates an event (Sensor Spe- when the FRU data of (FRU Info Agent) this devices is parsed cific) 33 FRU4 FRU Agent 0xC5 34 FRU5 FRU Agent 0xC5 0x6F Generates an event (Sensor Spe- when the FRU data of (FRU Info Agent) this devices is parsed cific) Event Offset offset 6,8 are used for details see 4.3.1.1 OEM sensor description offset 6,8 are used for details see 4.3.
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Software Description Table 4-4: SDR ID AT8404 sensors (Continued) Name Sensor Type Code Reading Type Code Description Event Offset offset 0,1 are used, 39 FRU4 Pwr Denied 0xCD 0x03 (FRU Power denied) (Digital Discrete) Generates an event when power for this FRU was denied. offset 0: event trigger, Normal Condition (Power Deny deasserted) offset 1: event trigger, Shelf Manager deny Power to this FRU for details see 4.3.1.
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Software Description Table 4-4: SDR ID AT8404 sensors (Continued) Name Sensor Type Code Reading Type Code 53 Vcc 2.5v FRU0 0x02 0x01 (Voltage) (Threshold) 54 Vcc 1.8v FRU0 0x02 0x01 (Voltage) (Threshold) 55 Vcc 1.
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Software Description Table 4-4: SDR ID AT8404 sensors (Continued) Name Sensor Type Code Reading Type Code Description Event Offset 0xCA 66 IPMC FwUp (External Component Firmware Upgrade Status) CLK1 Status 69 CLK2 Status PLL Status for details see 4.3.1.1 OEM sensor description for details see Kontron Clock Input Status Generates an event when CLOCK presence (Clock Input Sta- (Sensor Spe- status for CLK2 tus) cific) changes.
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Software Description 4.3.1.
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Software Description Kontron IPMB-L Link Table 4-6: Kontron IPMB-L Link sensor Event/Reading type code Sensor type Sensor specific offset Event trigger IPMB-L Disable Event Data 2: always 0 Event Data 3: bit[7:3]: always 0 bit [2:0]: 0h = no failure 0x02 1h = Unable to drive clock HI 2h = Unable to drive data HI 3h = Unable to drive clock LO 4h = Unable to drive data LO 5h = clock low timeout 6h = Under test (the IPM Controller is attempting to determine who is causing a bus hang) 0xC3 0x6F 07h =
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Software Description Kontron POST Code Value Table 4-7: Kontron POST code value sensor Event/Reading type code 0xC6 0x6F Sensor specific offset Sensor type Event trigger POST code LOW byte value, no event genarated on these offsets 0x00 to 0x07 OEM Kontron POST Code Error Event Trigger POST Code Value 0x14 Event Data 2: POST Low Nibble Event Data 3: POST High Nibble Kontron Switch Management Status Table 4-8: Kontron Switch management status sensor Event/Reading type code Sensor type 0xC8 O
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Software Description Kontron FRU Over Current Table 4-11: Kontron FRU over current sensor Event/Reading type code Sensor type 0xCB OEM Kontron 0x6F FRU Over Current Sensor specific offset Event trigger 0x00 Event Data 2: 0x01 0x00: Over Current on Management power. State Asserted / State Deasserted 0x01: Over Current on Payload power.
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Software Description Kontron Clock Input Status Table 4-14: Kontron clock input status sensor Event/Reading type code 0x6F Sensor type Sensor specific offset Event trigger 0xD1 0x00 (assertion) CLK line A not present, CLK line B not present OEM Kontron 0x01 (assertion) CLK line A present, CLK line B not present Clock Input Status 0x02 (assertion) CLK line A not present, CLK line B present 0x03 (assertion) CLK line A present, CLK line B present Kontron PLL Status Table 4-15: Kontron PLL s
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Software Description Table 4-17: Voltage Sensor Thresholds SENSOR Number / ID string Lower NonRecoverable Lower critical Lower non critical Upper non critical Upper critical Upper NonRecoverable ID=47: Vcc 12v FRU0 na 10.81 V 11.02 V 12.98 V 13.18 V na ID=49: Vcc 3.3vSus FRU0 na 2.96 V 3.15 V 3.47 V 3.66 V na ID=50: Vcc 1.2vSus FRU0 na 1.11 V 1.18 V 1.27 V 1.34 V na ID=51: Vcc 3.3v FRU0 na 2.99 V 3.17 V 3.47 V 3.66 V na ID=52: Vcc 2.5v FRU0 na 2.20 V 2.44 V 2.
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Software Description 4.3.2 OEM Commands The AT8404 supports the following OEM commands.
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Software Description 4.3.2.2 OemApGetFirmCap Command Name NetFn OemApGetFirmCap 0x30 LUN 3 Byte Num Command Number 0x03 Data Field Token: 0xAB - (~T) Request Data 1...5 0xCA - (~5) 0xCC - (~3) 0xCF - (~0) 0xC8 - (~7) Response Data 4.3.2.3 1 Completion Code 2..19 Data OemApSetFirmCap Command Name NetFn OemApSetFirmCap 0x30 Byte Num LUN 3 Command Number 0x04 Data Field Token: 0xAB - (~T) Request Data 1...5 0xCA - (~5) 0xCC - (~3) 0xCF - (~0) 0xC8 - (~7) Response Data 6..
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Software Description 4.3.2.4 CmdClockSetBplDriver This command controls the LVDS driver device on the backplane for the TELCO clocks. Command Name NetFn CmdClockSetBplDriver 0x30 Byte Num LUN 3 Command Number 0x72 Data Field Token: 0xAB - (~T) Request Data 1...
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Software Description 4.3.2.5 CmdClockGetBplDriver This command provides information about the LVDS driver device on the backplane for the TELCO clocks. Command Name NetFn CmdClockGetBplDriver 0x30 Byte Num LUN 3 Command Number 0x73 Data Field Token: 0xAB - (~T) Request Data 1...
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Software Description 4.3.2.6 CmdClockSetPLLConfig Command Name NetFn CmdClockSetPLLConfig 0x30 Byte Num LUN 3 Command Number 0x74 Data Field Token: 0xAB - (~T) 1...
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Software Description 4.3.2.7 CmdClockGetPLLConfig Command Name NetFn CmdClockGetPLLConfig 0x30 LUN 3 Byte Num Command Number 0x75 Data Field Token: 0xAB - (~T) Request Data 1...
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Software Description 4.3.2.8 CmdClockGetPLLStatus Command Name NetFn CmdClockGetPLLStatus 0x30 LUN 3 Byte Num Command Number 0x76 Data Field Token: 0xAB - (~T) Request Data 1...
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Software Description 4.3.2.9 ClockSetClkMux With this command the clock MUX 0 and MUX 1 can be configured to select the sources for AMC clocks (MUX domain 0) and the sources for the backplane clocks (MUX domain 1). This configurations will be stored in NV memory of the IPMC and will be restored after powerup. For clock e-keying purposes the indirect clock descriptors of the carrier has to be set in case of direct backplane connection, e.g.
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Software Description Byte Num Data Field Token: 0xAB - (~T) Request Data 1...
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Software Description 4.3.2.10 ClockGetClkMux See CmdClockSetClkMux() command. Command Name NetFn ClockGetClkMux 0x30 Byte Num LUN 3 Command Number 0x78 Data Field Token: 0xAB - (~T) Request Data 1...
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Software Description 4.3.2.11 ClockSetAmcClkBufferOverrride Controls the LVDS driver device on the backplane for the TELCO clocks and configure the PLL in case that the MUX domain0 is configured for PLL usage. Command Name NetFn ClockSetAmcClkBufferOverrride 0x30 LUN 3 Byte Num Command Number 0x79 Data Field Token: 0xAB - (~T) Request Data 1...
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Software Description 4.3.2.12 CmdGetStoragePortSelection This command reads the current setting of the storage switch between AMC B4 and AMC B1/AMC B3. Command Name NetFn CmdGetStoragePortSelection 0x30 LUN 3 Byte Num Command Number 0x91 Data Field Token: 0xAB - (~T) Request Data 1...
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Software Description 4.3.2.14 CmdGetPcieClkSrc This command returns the selected character of the PCIe clock source. Command Name NetFn CmdGetPcieClkSrc 0x30 LUN 3 Byte Num Command Number 0x95 Data Field Token: 0xAB - (~T) Request Data 1...5 0xCA - (~5) 0xCC - (~3) 0xCF - (~0) 0xC8 - (~7) Response Data 1 Completion Code Clock source: 2 0x00 – PCIe CLK SSC 0x01 – PCIe CLK NSSC 4.3.2.15 CmdSetPcieClkSrc This command sets the character of the PCIe clock source.
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Software Description 4.3.2.16 SetClockState Command Name Set ClockState NetFn PICMG OEM LUN 0 Command Number CmdId: 0x2C See PICMG AMC.0 R2.0 table 3-44. Ipmitool clk set [] : :here always 0 :[7:4] ignore [3] 1-enable, 0-disable [2] 1-source, 0-receiver [1:0] PLL ctrl () :1 (Sonet/SDH/PDH) :50 (stratum3a) For complete information refer to PICMG AMC.0 R2.0 section 3.9.2.5.
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Software Description 4.3.2.17 GetClockState Command Name Set ClockState NetFn PICMG OEM LUN 0 Command Number CmdId: 0x2D See PICMG AMC.0 R2.0 table 3-45. 4.3.3 Field Replaceable Unit (FRU) Information This FRU information contains the IPMI defined Board and Product Information areas that hold the part number and serial number of the board and the Multirecord Information Area that contains the PICMG defined Point to Point Information records.
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Software Description 4.3.5 IPMC Firmware Code IPMC firmware code is organized into boot code and operational code, both of which are stored in a flash module. Upon an IPMC reset, the IPMC executes the boot code and performs the following: • Self test to verify the status of its hardware and memory. • Calculates a checksum of the operational code. • Communicates with the Firmware Upgrade Manager (FUM) in order to inform the IPMC watchdog that the current IPMC firmware is suitable for execution.
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Software Description 4.3.6.3 Health LED (ATCA LED2) Green/Amber LED Table 4-22: Health LED state LED state Description ON (green) None of the health sensors is asserted ON (amber) At least one health sensor is asserted OFF Payload is not activated 4.3.6.4 Customer Definable LED (ATCA LED 3) This is an amber LED which can be used by a customer application. This LED can be controlled by PICMG 3.0 defined LED commands. 4.3.
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Software Description 4.4 Firmware Administration On a running AT8404 system, the switching application is executed from within the WindRiver Linux operating system environment. This includes the linux kernel itself which is started by the systems bootmonitor, the root file system and the FASTPATH switching application itself. These software components, together with the IPMC image, make the AT8404 firmware. The flash holding the AT8404 software is divided into nine partitions.
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Software Description 4.4.1 Updating the Firmware The update package comes as a group of packages, located in the \release\data\update folder (example release: GA-2.04): • t5307-GA-2.04.pkg T5307 SYSTEM update (bootloader and system FW) • t5307-ipmi-GA-2.04.hpm T5307 IPMI HPM update • t5307-pld-update-GA-2.04.pkg T5307 PLD update The firmware - including bootloader - image is updated using the CLI.
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Software Description image2 : Product ID Product Variant U-Boot Release Manufacturer ID Build-Date : : : : : 5307 0 GA 2.03 15000 20080131185554 Images currently available on Flash image1 (U-Boot) ---------------GA 2.04 image2 (U-Boot) ---------------GA 2.03 current-active -------------image2 next-active -------------image1 7. Restart the board (Ethernet Fabric) #reload 8. It is recommended to copy image 1 to image 2 to have a fully redundant system (Ethernet Fabric) #copy image2 image1 4.4.
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Software Description ------------------------------------------------------------------------------|ID | Name | Versions | Upload Progress | Upload| Image | | | | Active| Backup| File |0% 50% 100%| Time | Size | |---|-----------|-------|-------|-------||----+----+----+----||-------|-------| | 1 |IPMC | 5.24 | 5.24 | 5.24 ||...................Performing activation stage: || 01.26 | 354e5 | ------------------------------------------------------------------------------Waiting firmware activation...
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Software Description The onboard FPGA can be updated using the 'copy' command from the Fastpath CLI: (Ethernet Fabric) #copy tftp:///t5307-pld-update-GA-2.04.pkg image2 Mode........................................... Set Server IP.................................. Path........................................... Filename....................................... Data Type...................................... Destination Filename........................... TFTP 192.168.50.5 ./ t5307-pld-update-GA-2.
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Software Description 4.5 Carrier Clocking 4.5.1 Clock source to AMC The receive clocks of each AMC in the Carrier can be provided by different sources: • From PLL (8kHz frame-pulse or 19,44MHz) • From backplane clock This needs indirect clock configuration that has to be set previously, see example. • From another AMC in the carrier The FPGA can route all AMC output clocks (TCLKB or TCLKD) of all four AMC slots to all AMC input clocks (TCLKA and TCLKC) of all four AMC slots. 4.5.1.
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Software Description • AMC B1 TCLKA is sourced by AMC B2 (TCLKB) Figure 4-2: AMC TCLKA sourced by AMC TCLKB Direct Clock Descriptor OEM ClockSetMUX() MUX Domain 0 (NV restore) PLD/PLL 19.
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Software Description Note... The settings of the indirect clock configuration is stored in NV-memory and is restored after powerup. 4.5.2 Clock source to backplane from any AMCs TCLK-B/D The Clock source selection is done by OEM mechanism with automatic NV restore. Enabling the clock buffer to the backplane is done via an OEM command (ClockSetBpldriver). The MUX (domain 1) selection is stored in NV-memory and is restored after powerup.
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Software Description 4.5.2.1 Clock ekeying Endpoint for the clock match finder has to be set in indirect clock configuration. This setting is required for the match finder to enable the clock source on AMC. The settings of the indirect clock configuration is stored in NV-memory and is restored after powerup.
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Software Description 3. Configure MUX (domain 1) for AMC B2 (Ethernet Fabric) #set board clock mux-bpl clk3b amcb2 tclkb 4. Set indirect clock descriptor (necessary for clock ekeying match finder) (Ethernet Fabric) #set board clock receiver amcb2 tclkb enable sonet stratum3E 8kHz 5.
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Software Description 3.
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Software Description vlan pvid 4002 vlan tagging 4003 exit interface 0/2 description AMC_B1_FI_Port_9 vlan participation exclude 1 vlan participation include 4002 vlan participation include 4003 vlan pvid 4002 vlan tagging 4003 exit interface 0/3 description AMC_B1_FI_Port_10 vlan participation exclude 1 vlan participation include 4002 vlan participation include 4003 vlan pvid 4002 vlan tagging 4003 exit interface 0/4 description AMC_B1_FI_Port_11 vlan participation exclude 1 vlan participation include 400
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Software Description interface 0/9 description AMC_B2_FI_Port_11 vlan participation exclude 1 vlan participation include 4002 vlan participation include 4003 vlan pvid 4002 vlan tagging 4003 exit interface 0/10 description AMC_B2_BI_Port_0 vlan participation include 4001 vlan tagging 4001 exit interface 0/11 description AMC_B3_FI_Port_8 vlan participation exclude 1 vlan participation include 4002 vlan participation include 4003 vlan pvid 4002 vlan tagging 4003 exit interface 0/12 description AMC_B3_FI_Port
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Software Description interface 0/16 description AMC_B4_FI_Port_8 vlan participation exclude 1 vlan participation include 4002 vlan participation include 4003 vlan pvid 4002 vlan tagging 4003 exit interface 0/17 description AMC_B4_FI_Port_9 vlan participation exclude 1 vlan participation include 4002 vlan participation include 4003 vlan pvid 4002 vlan tagging 4003 exit interface 0/18 description AMC_B4_FI_Port_10 vlan participation exclude 1 vlan participation include 4002 vlan participation include 4003 vl
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Software Description interface 0/23 description BI_Channel_1 exit interface 0/24 description BI_Channel_2 vlan participation exclude 1 vlan participation include 4001 vlan pvid 4001 exit interface 0/25 description FI_Channel_1 vlan participation exclude 1 vlan participation include 4002 vlan pvid 4002 exit interface 0/26 description FI_Channel_2 vlan participation exclude 1 vlan participation include 4003 vlan pvid 4003 exit exit 4.6.
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Software Description • kex_ipmi • Basic IPMI features: • Sensor list • SEL entries • FRU entries • FRU-Device information • FRU-Control commands • Extended IPMI monitoring functions • Site table • SEL-trap filter • SEL-trap • kex_mgmt • Egress COS drop counter • Packet Memory Management • Protection Port Groups • Advertise Speed • Update/Startup status • LAG multicast hashing • VLAN multicast flooding • port multicast flooding • LAG unicast enhanced hashing • Send IGMP reports • CPU load • Port learning •
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Software Description 4.6.2.1 Configuring SNMP traps Sending SNMP traps from the AT8404 carrier can be configured either from FASTPATH CLI or using SNMP. The following example configures an SNMP trap for PLL state changes (for information about IPMI sensor definition, see “OEM sensor description” on page 62.). • Configure SNMP trap receiver (example: Trap name: testtrap, IP-address: 10.0.0.114) (Ethernet Fabric) configure (Ethernet Fabric) (Config)#snmptrap testtrap ipaddr 10.0.0.
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Software Description 4.6.3 Using the “current-settings” file The current-settings file is used to do the default configuration of the carrier with respect to: • network interface configration • watchdog configuration • SSH configuration • IPMI over LAN configuration • DHCP configuration Using the file to change any default configuration must be taken very carefully to avoid misconfigurations.
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Software Description ## ## ## ## ## ## ## Set to "no" to disable all network interfaces.
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Software Description CONFIG_ETH1_IP="dhcp" CONFIG_ETH1_NETMASK="" CONFIG_ETH1_BROADCAST="" CONFIG_ETH1_VLAN_ID="" CONFIG_ETH1_VCONFIG="" CONFIG_ETH1_IFCONFIG="" CONFIG_ETH1_4001_DEV="eth1.4001" CONFIG_ETH1_4001_IP="dhcp" CONFIG_ETH1_4001_NETMASK="" CONFIG_ETH1_4001_BROADCAST="" CONFIG_ETH1_4001_VLAN_ID="4001" CONFIG_ETH1_4001_VCONFIG="" CONFIG_ETH1_4001_IFCONFIG="" CONFIG_ETH1_4002_DEV="eth1.
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Software Description 4.6.3.1 Enabling Telnet access for port 2323 (linux) This setting allows to access the Carrier Linux shell by using telnet port 2323. [...] ## set to yes to start OS telnetd on port 2323 CONFIG_START_TELNETD="yes" [...] 4.6.3.2 Enabling SSH to access the Carrier An SSH connection can be established to the Linux shell using the service port. To use SSH, the keys must be generated and copied to the carrier in an extra-profile.tar.
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Chapter 5 Thermal Considerations 106KTC5520/EATX www.kontron.
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Thermal Considerations 5. Thermal Considerations The following chapters provide system integrators with the necessary information to satisfy thermal and airflow requirements when implementing AT8404 applications. 5.1 Thermal Monitoring To ensure optimal operation and long-term reliability of the AT8404, all onboard components must remain within the maximum temperature specifications. The most critical components on the AT8404 are the Unit Computer and the Ethernet Switch.
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Thermal Considerations The following table shows the temperature thresholds of all sensors.
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Thermal Considerations 5.3 Airflow In order to allow system integrators to optimize environmental conditions for the AMCs operated in the AT8404, airfow measurements according to CP-TA Interoperability Compliance Document (AdvancedTCA Book 1.1) were performed. Two measurements were done with different AMC configurations. For each configuration, the pressure drop between inlet and outlet is measured (upper graph). The red curve represents an ATCA reference board as defined by the CP-TA.
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Thermal Considerations In configuration B, all four AMC slots are populated with air blocker modules. The air blockers simulate the maximum component envelope which is allowed on an AMC. This corresponds to the highest possible air impedance.
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Appendix A Getting Help 1KTC5520/EATX www.kontron.
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Getting Help A. Getting Help If, at any time, you encounter difficulties with your application or with any of our products, or if you simply need guidance on system setups and capabilities, contact our Technical Support at: North America EMEA Tel.: (450) 437-5682 Tel.: +49 (0) 8341 803 333 Fax: (450) 437-8053 Fax: +49 (0) 8341 803 339 If you have any questions about Kontron, our products, or services, visit our Web site at: www.kontron.
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Getting Help • Fax • Send us a fax at: North America (450) 437-0304, EMEA +49 (0) 8341 803 339. In the fax, you must include your name, your company name, your address, your city, your postal/zip code, your phone number and your e-mail. You must also include the serial number of the defective product and a description of the problem. • E-mail • Send us an e-mail at: RMA@ca.kontron.com in North America or at: orderprocessing@kontronmodular.com in EMEA.
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Appendix B Glossary 1KTC5520/EATX www.kontron.
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Glossary B. Glossary Acronyms Descriptions ACPI Advanced Configuration & Power Interface AdvancedMC (Same as AMC). Advanced Mezzanine Card. AMC (Same as AdvancedMC). Advanced Mezzanine Card. AMC.0 Advanced Mezzanine Card Base Specification. AMC.1 PCI Express and Advanced Switching on AdvancedMC. A subsidiary specification to the Advanced Mezzanine Card Base Specification (AMC.0). AMC.2 Ethernet Advanced Mezzanine Card Specification.
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Glossary Acronyms Descriptions DMI Desktop Management Interface DRAM Dynamic Random Access Memory DTC Data Transfer Controller DTR Data Terminal Ready DTS Digital Thermal Sensor in IA32 processors. ECC Error Checking and Correction EEPROM Electrically Erasable Programmable Read-Only Memory EISA Extended Industry Standard Architecture. Superset of ISA, 32-bit bus architecture.
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Glossary Acronyms Descriptions IPMB-0 Intelligent Platform Management Bus Channel 0, the logical aggregation of IPMB-A and IPMB-B.
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Glossary Acronyms Descriptions PHY PHYsical layer. Generic electronics term referring to a special electronic integrated circuit or functional block of a circuit that takes care of encoding and decoding between a pure digital domain (on-off) and a modulation in the analog domain. PICMG PCI Industrial Computer Manufacturers Group PICMG® PCI Industrial Computer Manufacturers Group PLD Programmable Logic Device PLL Phase Lock Loop PNE Platform for Network Equipment. A Carrier Grade Linux (4.
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Glossary Acronyms Descriptions USB Universal Serial Bus VLAN Virtual Local Area Network WD WatchDog WDT WatchDog Timer B-6 AT8404 User Guide www.kontron.