Data Sheet

AC4490
Datasheet
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12
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5.2 Pin Descriptions
5.2.1 Generic I/O
Both GI0 and GI1 pins serve as generic input pins and both GO0/1 pins server as generic output pins. Reading and writing of
these pins can be performed using CC Commands. These pins alternatively serve as control pins when modem mode is
enabled.
5.2.2 TXD & RXD
Serial TTL
The AC4490-200 accepts 3.3 or 5 V DC TTL level asynchronous serial data on the RXD pin and
interprets that data as either command data or transmit data. Data is sent from the transceiver, at
3.3V levels, to the OEM host via the TXD pin.
Note: The AC4490-1000 and AC4490-1x1 transceivers only accept 3.3 V level signals.
5.2.3 CTS
The AC4490 has an interface buffer size of 256 bytes. If the buffer fills up and more bytes are sent to the transceiver before
the buffer can be emptied, data loss occurs. The transceiver prevents this loss by asserting CTS High as the buffer fills up and
asserting CTS Low as the buffer is emptied. CTS On and CTS On Hysteresis control the operation of CTS. CTS On specifies
the amount of bytes that must be in the buffer for CTS to be disabled (logic High). Even while CTS is disabled, the OEM host
can send data to the transceiver, but it should do so carefully.
Note: The CTS On and CTS On Hysteresis bytes of the EEPROM can be set to 1, in which case CTS goes high as data
is sent in and low when the buffer is empty.
5.2.4 GND
Signal Ground. Pins are internally connected.
5.2.5 RTS
With RTS disabled, the transceiver sends any received data to the OEM host when it is received. However, some OEM hosts
are not able to accept data from the transceiver all of the time. With RTS enabled, the OEM host can prevent the transceiver
from sending data by setting RTS logic High. Once RTS is set logic Low, the transceiver can send packets to the OEM host as
they are received.
Note: Leaving RTS logic high for too long can cause data loss once the 256 byte receive buffer fills up.
5.2.6 Test
When pulled logic Low before applying power or resetting, the transceiver’s serial interface is forced to 9600 baud, 8-N-1 (8
data bits, No parity, 1 stop bit). To exit, the transceiver must be reset or power-cycled with Test pin logic High. This pin is used
to recover transceivers from unknown baud rates only. It should not be used in normal operation. Instead, the transceiver
Interface Baud Rate should be programmed to 9600 baud if that rate is desired for normal operation.
Note: Laird does not recommend permanently grounding the Forced_9600 pin. This mode was intended for recovering
transceivers from unknown settings and was not intended to be used in real-time communications. The following
modes are affected:
Modem mode = disabled
Parity mode = disabled
Interface Timeout = 0x40
It is also possible that future modes will be disabled by grounding Forced_9600.