Data Sheet
Table Of Contents
- 1 Overview and Key Features
- 1.2 Application Areas
- Features and Benefits
- 2 Specifications
- 3 Hardware Specifications
- 3.1 Block Diagram and Pin-out
- 3.2 Pin Definitions
- 3.3 Electrical Specifications
- 4 Functional Description
- 4.1 Power Management (includes brown-out and power on reset)
- 4.2 Clocks and Timers
- 4.3 RF
- 4.4 UART Interface
- 4.5 SPI Bus
- 4.6 I2C Interface
- 4.7 General Purpose I/O, ADC and PWM/FREQ
- 4.8 nRESET Pin
- 4.9 nAutoRUN Pin
- 4.10 RM1xx VSP Service and Modes
- 4.11 Two-Wire SWD Programming/Debug Interface
- 4.12 RM1xx on-board chip antenna characteristics
- 5 Hardware Integration Suggestions
- 6 Mechanical Details
- 7 Application Note for Surface Mount Modules
- 8 FCC and IC Regulatory Statements
- 9 CE Regulatory
- 10 EU Declarations of Conformity
- 11 Ordering Information
- 12 Bluetooth SIG Qualification
RM1xx LoRa/BLE Modules
Datasheet
https://connectivity.lairdtech.com/wireless-
modules/lorawan-solutions
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Figure 6: UART Signals
Note: The RM1xx serial module output is at CMOS logic levels that track VCC. Level conversion must be added to
interface to provide an RS-232 level compliant interface.
Some serial implementations link CTS and RTS to remove the need for handshaking. Laird does not recommend linking CTS
and RTS other than for testing and prototyping. If these pins are linked and the host sends data at the point that the RM1xx
deasserts its RTS signal, then there is significant risk that internal receive buffers will overflow, which could lead to an
internal processor crash. This will drop the connection and may require a power cycle to reset the module. Laird
recommends that the correct CTS/RTS handshaking protocol be adhered to for proper operation.
Table 16: UART Interface
Signal Name Pin # I/O Comments
SIO_21/UART_TX 2 O SIO_21 (alternative function UART_TX) is an output, set high (in FW).
SIO_22/UART_RX 3 I
SIO_22 (alternative function UART_RX) is an input, set with internal pull-up (in
FW).
SIO_23/UART_RTS 4 O SIO_23 (alternative function UART_RTS) is an output, set low (in FW).
SIO_24/UART_CTS 5 I
SIO_24 (alternative function UART_CTS) is an input, set with internal pull-down
(in FW).
The UART interface is also used to load customer developed smartBASIC application script.
4.5 SPI Bus
The SPI interface is an alternate function on SIO pins, configurable by smartBASIC.
The module is a master device that uses terminals SPI_MOSI, SPI_MISO, and SPI_CLK. SPI_CSB is implemented using any
spare SIO digital output pins to allow for multi-dropping.
The SPI interface enables full duplex synchronous communication between devices. It supports a three-wire (SPI_MOSI,
SPI_MISO, SPI_SCK,) bidirectional bus with fast data transfers to and from multiple slaves. Individual chip select signals are
necessary for each of the slave devices attached to a bus, but control of these is left to the application through use of SIO
signals. I/O data is double buffered.
The SPI peripheral supports SPI mode 0, 1, 2, and 3.
Table 17: Peripheral supports
Signal Name Pin # I/O Comments
SPI_MOSI 17 O This interface is an alternate function configurable by
smart BASIC. Default in the FW pin 15 and 17 are inputs. SPIOPEN() in smart
BASIC selects SPI function and changes pin14 and 16 to outputs (when in SPI
master mode).
SPI_MISO 16 I
SPI_CLK 15 O