Integration Guide

406.1125-419.9875MHz GFSK version (7700L) Specific Requirements
Document p/n: 9S01-7700-A301, rev.
Cattron-Theimeg Inc. Proprietary and Confidential
3-3
3. Specific Requirements
3.1. External Interface Requirements
3.1.1. Interfaces
3.1.1.1 50 Pin Header I/O.
PIN Label Description
1,2 RFVBAT Switched Battery voltage to RF Deck, 5V5 min – 16V max.
3,4 GND
5-14 N/C
15 SWD O/P, Sync Word Detect, asserts High, (may be programmed Low), when a
specific data frame is received. May be used to lock to talkback message on
CAT800.
16-19 N/C
20 DATCLK I/O, Clock,
When in RX mode leading edge is synchronous with RX Data,
When in TX mode data is latched in on leading edge.
IF in UART mode used to output TX Data.
21 ENA I/P, Enable RF deck when High.
22 GND
23 PAON I/P, RF Power ON and switch to TX mode when High.
24 PLE I/P, Load Enable, Control Data is latched into registers when High
25 TRDAT Data I/O when synchronous, RX data OUT when asynchronous.
26 TXD TX in when asynchronous (Fit R35)
27 3V3 Regulated input for synthesizer.
28 3V3/5V Regulated input for E2PROM
29 N/C
30 PCLK I/P, Control Register Clock, data clocked on rising edge.
31 PDI I/P, Control Register data read in.
32 PDO O/P, Control Register data read out, MSB first.
33 RXD1 May be used to output Received Data (Fit R35).
34 MUX O/P, TRX status, multi use.
35-37 N/U
38 SDA TRX E2PROM
39 SCL TRX E2PROM
40 N/U
41 G8 I/P, PA +8dB Gain, assert High
42 N/U
43 G16 I/P, PA +16dB Gain, assert High
44-50 N/U