User's Manual

M2US50NBT/M2SD50NBT
Hardware Integration Guide
Embedded Wireless Solutions Support Center:
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www.lairdtech.com/wireless
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BLUETOOTH FUNCTIONAL DESCRIPTION
The M2US50NBT/M2SD50NBT Bluetooth (BT) block is based on the CSR8811A08 and described in the Table 3.
Table 3: Bluetooth functions
Feature
Description
HCI-UART Interface
The UART Interface is a standard high-speed UART interface. It operates up to 4 Mbps,
supporting Bluetooth HCI UART interface.
PCM or I2S Interface
 Continuous PCM encoded audio data transmission and reception over Bluetooth
 Processor overhead reduction through hardware support for continual
transmission and reception of PCM data
 A bi-directional digital audio interface that routes directly into the baseband layer
of the firmware. It does not pass through the HCI protocol layer
 Hardware on CSR8811 for sending data to and from a SCO connection
 Up to three SCO connections on the PCM interface at any one time
 PCM interface master, generating PCM_SYNC and PCM_CLK
 PCM interface slave, accepting externally generated PCM_SYNC and PCM_CLK.
 Various clock formats including:
– *Long Frame Sync
– *Short Frame Sync
 GCI timing environments
 13-bit or 16-bit linear, 8-bit μ-law or A-law companded sample formats
 Receives and transmits on any selection of three of the first four slots following
PCM_SYNC
 The PCM configuration options are enabled by setting SKEY_PCM_CONFIG32
CPU and Memory
 Uses a 16-bit RISC MCU for low power consumption and efficient use of memory.
The MCU, interrupt controller, and event timer run the Bluetooth software stack
and control the Bluetooth radio and host interfaces.
 56 KB of on-chip RAM is provided to support the RISC MCU and is shared between
the ring buffers used to hold voice/data for each active connection and the
general-purpose memory required by the Bluetooth stack.
 5 Mb of Internal ROM memory is available on the CSR8811. This memory is
provided for system firmware, storing CSR8811 settings and program code.
Build-in Standard
WLAN Coexistence
The M2US50NBT/M2SD50NBT internally supports the standard WLAN coexistence
interface through the WLAN_ACTIVE, BT_PRIORITY, and BT_ACTIVE pins.
Reference Clock
The BT block is configured for 26 MHz reference clock frequency. The clock source is
provided to BT internally from the WLAN block on demand from BT_CLK_REQ.
Note: The WLAN block must be initialized prior before BT clock sharing is enabled.
BT Low Energy
Supports Low Energy specification which allows for connections to devices with single
mode LE function (such as a watch, sensor, and HID). The implementation is optimized
for coexistence with WLAN.
BT_RFKILL
The NGFF pin-54 is connected to (BT_PWD_L) resets and powers down the BT block.
Holding the pin-54 at Low state turns off the entire BT block; all state information is
lost. To ensure a full reset, the reset signal should be asserted for a period greater
than five milliseconds.