Data Sheet

xPico
®
200 Series Embedded Wi-Fi
®
Gateway Data Sheet 23
SPI Slave Interface
The xPico 200 gateway has one external SPI slave interface for connection an external SPI
master using the gSPI implementation. The signal levels on the SPI slave interface are
3.3V tolerant. This interface is shared with the SDIO interface pins. SDIO is not available in
the current product release.
Note: The SPI master interface uses different pins than the SPI slave interface.
Table 4-3: xPico 200 SPI Slave Interface Signal Definitions
Pin Name Description SMT Pin Edge Conn.
Pin
SPI_CLK
SPI Slave Clock
2
9
SPI_MOSI
SPI Master Out-Slave In
3
11
SPI_MISO
SPI Master In-Slave Out
4
13
SPI_IRQ
SPI Slave Interrupt
5
15
SPI_CS
SPI Slave Chip Select
7
19
SDIO_MODE/SPI_SLAVE_MODE
Master/Save
• Pull high for master mode
(not currently supported)
• Pull low for slave mode
29
14
SPI Master Interface
The xPico 200 gateway has one external SPI master interface for connection an external
SPI slave. The signal levels on the SPI interface are 3.3V tolerant. This interface is shared
with the configurable GPIO pins.
Note: The SPI slave interface uses different pins than the SPI master interface.
Table 4-4: xPico 200 SPI Master Interface Signal Definitions
Pin Name Description SMT Pin Edge Conn.
Pin
CP7/SPI_CLK
SPI Clock
10
42
CP4/SPI_MOSI
SPI Master Out-Slave In
9
44
CP3/SPI_MISO
SPI Master In-Slave Out
8
46
CP2/SPI_IRQ
SPI Interrupt
12
48
CP8/SPI_CS
SPI Chip Select
11
40
Configurable General Purpose I/O Pins (GPIO)
The xPico 200 module provides up to 10 configurable General Purpose Input/Output (GPIO)
pins. Certain GPIOs are multiplexed with other interface functions (e.g. SPI). Mapping of these
functions to CPs will be driven via configuration and applied at system initialization.
Each CP can be configured as a general purpose input, general purpose output, micro-