User Manual

Page 57 of 129 54A0028-6 042019 © LeddarTech Inc.
5.1.4. SPI Operation
The SPI operation includes four parameters: SPI port configuration, speed and timing, access, and
modification.
5.1.4.1. SPI Port Configuration
The SPI port must be configured in the 0 mode (see section 5.1.1 SPI Basics 45) to communicate
with the receiver module.
5.1.4.2. Sensor Hard Reset
A hard-reset pin is available to reboot the sensor. The standard hard reset chronogram is shown
on Figure 26 below: the nCS must not be asserted during this reset sequence. The minimum reset
state time (Trst) is 1 millisecond. The minimum wait time after reset state release (Twait) is
100 milliseconds.
Figure 26: Standard hard reset chronogram
To prevent the receiver module to go into the bootloader mode, the port must never have all SPI
input pins (nCS, MOSI and CLK) set to the low level for more than 100 milliseconds at power up or
when performing a hard reset.
5.1.4.3. Speed and timing
For the read operation, a delay is needed between the header (group containing the opcode,
address, and size data), and the return data stream to let the receiver module to decode the request
and get the ready data to the clock. This delay can be set to 1 millisecond, during this delay, the
SPI clock must be halted and the nCS must be staying asserted (see Figure 22).