User Manual

Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 1 5
Figures
2-1 Active ODT for a Differential Link Example............................................................17
2-2 Input Device Hysteresis .....................................................................................18
2-3 VCC Static and Transient Tolerance Loadlines1,2,3,4..............................................35
2-4 VCC Overshoot Example Waveform......................................................................36
2-5 Load Current Versus Time (Frequency Optimized Server/Workstation),2...................37
2-6 Load Current Versus Time (Advanced Server/Workstation),2................................... 38
2-7 Load Current Versus Time (Standard Server/Workstation),2....................................39
2-8 Load Current Versus Time (Low Power & LV-60W),2...............................................40
2-9 Load Current Versus Time (Low Power & LV-40W),2...............................................41
2-10 VTT Static and Transient Tolerance Loadlines........................................................42
2-11 Intel® QuickPath Interconnect Electrical Test Setup for Validating
Standalone TX Voltage and Timing Parameters......................................................57
2-12 Intel® QuickPath Interconnect Electrical Test Setup for Validating
TX + Worst-Case Interconnect Specifications ........................................................57
2-13 Distribution Profile of Common Mode Noise for Either Tx or Rx.................................58
2-14 Distribution Profile of UI-UI Jitter and Accumulated Jitter........................................58
2-15 Eye Mask at the End of Tx + Channel...................................................................59
2-16 Differential Clock Crosspoint Specification.............................................................59
2-17 Differential Clock Measurement Points for Duty Cycle and Period ............................. 60
2-18 Differential Clock Measurement Points for Rise and Fall time ...................................60
2-19 Single-Ended Clock Measurement Points for Absolute Cross Point and Swing .............60
2-20 Single-Ended Clock Measurement Points for Delta Cross Point ................................. 61
2-21 Differential Clock Measurement Point for Ringback.................................................61
2-22 DDR3 Command / Control and Clock Timing Waveform ..........................................61
2-23 DDR3 Clock to Output Timing Waveform ..............................................................62
2-24 DDR3 Clock to DQS Skew Timing Waveform .........................................................62
2-25 TAP Valid Delay Timing Waveform .......................................................................63
2-26 Test Reset (TRST#), Asynch GTL Input, and PROCHOT# Timing Waveform ............... 63
2-27 THERMTRIP# Power Down Sequence ...................................................................63
2-28 Voltage Sequence Timing Requirements ...............................................................64
2-29 VID Step Times and Vcc Waveforms ....................................................................65
3-1 Maximum Acceptable Overshoot/Undershoot Waveform..........................................68
4-1 Processor Package Assembly Sketch .................................................................... 69
4-2 Processor Package Drawing (Sheet 1 of 2)............................................................71
4-3 Processor Package Drawing (Sheet 2 of 2)............................................................72
4-4 Processor Top-Side Markings ..............................................................................74
7-1 Frequency Optimized Server/Workstation Platform Thermal Profile (6 Core) ............ 117
7-2 Frequency Optimized Server/Workstation Platform Thermal Profile (4 Core) ............ 118
7-3 Advanced Server/Workstation Platform Thermal Profile A and B (6 Core) ................ 119
7-4 Advanced Server/Workstation Platform Thermal Profile A and B (4 Core) ................ 121
7-5 Standard Server/Workstation Platform Thermal Profile (6 Core)............................. 123
7-6 Standard Server/Workstation Platform Thermal Profile (4 Core)............................. 124
7-7 Low Power Platform 60W Thermal Profile (6 Core) ............................................... 125
7-8 Low Power Platform 40W Thermal Profile (4 Core) ............................................... 126
7-9 LV-60W Processor Dual Thermal Profile.............................................................. 127
7-10 LV-40W Processor Dual Thermal Profile .............................................................. 129
7-11 Case Temperature (TCASE) Measurement Location .............................................. 130
7-12 Frequency and Voltage Ordering........................................................................ 132
7-13 Ping()............................................................................................................ 136
7-14 Ping() Example ............................................................................................... 136