Technical Specification (TM01LA-N)
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Contents 1. Product Introduction..................................................................................................... 4 1.1 Block Diagram .................................................................................................... 4 1.2 Environmental Specifications.............................................................................. 6 1.3 Electrical Specifications ...................................................................................... 6 1.3.
. GNSS ...................................................................................................................... 28 4.1 GNSS Characteristics....................................................................................... 28 4.2 GNSS Antenna Interface .................................................................................. 29 4.3 Active antenna Powering the External LNA ......................................................
1. Product Introuction The TM01LA-N are designed for the automotive industry. They support LTE, WCDMA and GSM air Interface standards. They also have Global Navigation satellite system (GNSS) capabilities including GPS and GLONASS. The TM01LA\-N are based on the Qualcomm MDM9215 wireless chipsets and support the following bands. Table 1. Supported Band Region LTE Band NA B2/B4/B5/B7/B17 WCDMA B2/B4/B5 GSM GSM850/PCS1900 GNSS Voice TML1-E O O 1.1 Block Diagram Figure 1.1.
1.2 Environmental Specifications The environmental specification for operating and storage of the TM01LA-N are defined in the the table below. LGE guarantee the automotive operation by internal reliability verification Table 2.
1.3.2 Current Consumption Table 4.
1.4.2 Mechanical Drawing [Top view] [Right view] [Bottom view] 1.4.
[LGA PAD View] 1.5 PCB information 1.5.
1.5.2 PCB via structure 2. Pin Definitions Pin No. Name Direction 12 ANT_MAIN Input/Output 15 ANT_DIVERSITY Input ANT_GNSS Input Description RF Antenna Pads GNSS Antenna Pad 126 Power Supply Pads 81,82,91,92 +3.7V_VPWR Input Power Supply Input 114 VREG_MDME Output Voltage Reference Output (1.8V) 84 VDD_AUDIO_3.3V Input Audio codec power supply (typ 3.3V) 135 VCOIN_3.
185 USB_VBUS Input USB Power Supply 198 USB_D+ Input/Output Differential data interface positive 183 USB_D- Input/Output Differential data interface negative 199 USB_ID Input USB ID 153 UART_RXD Output Receive Data (UART1) 169 UART_TXD Input Transmit Data (UART1) 154 UART2_RXD Output UART2 Receive Data 170 UART2_TXD Input UART2 Transmit Data 146 VREG_USIM Output Supply output for an UIM card 177 UIM_DET Input Detection of an external UIM card 162 UIM_RESET Output R
9 ADC2 Input Analog to Digital Converter Input 204 ADC1 Input Analog to Digital Converter Input LED Output LED Driver control 171 SPI_CLK Output SPI Serial Clock 186 SPI_MISO Input SPI Serial input 201 SPI_MOSI Output SPI Serial output 202 SPI_CS_N Output SPI Chip Select ON/OFF Input ON/OFF Control 140 SDIO_DATA0 Input/Output SDIO Data bit 0 122 SDIO_DATA1 Input/Output SDIO Data bit 1 141 SDIO_DATA2 Input/Output SDIO Data bit 2 142 SDIO_DATA3 Input/Output SDIO
120 WIFI_RESET_N Reserved 180 GPIO68 Reserved 181 GPIO65 Reserved 182 GPIO66 Reserved 197 GPIO67 Reserved 158 PBL_STATUS/HSIC_RST_N 145 XO_OUT Reserved 155 UART_RTS/ Reserved 156 UART_CTS/ Reserved 160 TCU_PCM_RXD Reserved 165 WAKE_N Reserved 176 TCU_PCM_CLK Reserved 191 TCU_PCM_FRAME Reserved 192 TCU_PCM_TXD Reserved 200 I2S_MCLK Reserved 205 NDR_PULSE Reserved 149 GPIO_49 Reserved Clock Reserved Ground 1,4,5,6,7,8,9,10,11,13, 14,16,20,21,22,23,24, 25,26,
The ON/OFF signal is internally pulled up to an internal 1.8V reference voltage. An open drain transistor should be connected to this pin to generate a low pulse. This pin should not be driven high external to the TM01LA-N embedded module. 2.2.1 ON/OFF Timing (TBD) The ON/OFF pin is a low pulse toggle control. The first pulse powers the TM01LA-N ON, a second pulse instructs the TM01LA-N to begin the Shutdown process.
Table8. Power-ON Sequence Symbol Definitions (TBD) Symbol Parameter Min t ON Turn ON Pulse duration TBD t OFF Turn OFF Pulse duration TBD t pwroff Time to Power OFF t pwrrmv Time +3.7V_VPWR must be TBD maintained after VREG_MDME goes inactive t HI Time required for ON/OFF to TBD be TBD high prior to OFF pulse. Typ TBD TBD TBD Max TBD T pwroff is the time between when a power OFF pulse is complete and when shutdown is completed by the TM01LA-N devices. This duration is network and device dependent, i.e.
Device Network Standard Parameter TM01LA-N GSM DRX WCDMA DRX LTE DRX The DRX cycle index values are broadcast by the wireless network on which the TM01LA-N embedded module is registered. While in Deep Sleep mode the functions of the TM01LA-N are limited as defined in the following table. Table10.
The TM01LA-N has a High Speed USB2.0 compliant, peripheral only interface. The TM01LA-N don’t support OTG. The TM01LA-N will not be damaged if a valid USB_VBUS is supplied while the main DC power is not supplied. Table10. USB Characteristics USB USB_VBUS 1 Voltage range Maximum Current draw 1 Maximum Input Capacitance (Min ESR = 50 mΩ) Value Units 2.0 – 5.25 1 10 V mA µF With the TM01LA-N device powered ON. 2.4 UART The TM01LA-N has two UART interfaces.
The TM01LA-N defines 10 GPIOs for customer use. Table14. GPIO Inferface PADs Pin No. Name Direction Description 172 GPIO1 Pull-Down Available-GPIO 128 GPIO2 Pull-Down Available-GPIO 150 GPIO3 Pull-Down Available-GPIO 164 GPIO4 Pull-Down Available-GPIO 139 GPIO5 Pull-Down Available-GPIO 189 GPIO6 Pull-Down Available-GPIO 137 GPIO7 Pull-Down Available-GPIO 138 GPIO8 Pull-Down Available-GPIO 148 GPIO9 Pull-Down Available-GPIO 130 GPIO10 Pull-Down Available-GPIO 2.
The TM01LA-N provides an interface to allow an external application to RESET the module as well as an output to indicate the current RESET state or control an external device. The RESIN_N signal is pulled-up internal to the TML1-X. An open collector transistor or equivalent should be used to Ground the signal when necessary to RESET the module. Note: Use of the RESIN_N signal to RESET the TM01LA-N could result in memory corruption if used inappropriately.
The TM01LA-N provides two ADC inputs. The interface information is provided in the tables below. Table18. ADC Interface Characteristics ADC ADCx Full-Scale Voltage Level Resolution Sample rate Input Impedance Value 0.05 ~ 1.75 15 1.15(tbd) >4 Units V bit KHz MΩ 2.11 LED driver The TM01LA-N provides an LED driver. The LED driver is a programmable current sink. Table19. LED Inferface PAD Pin No. Name Direction Description 188 LED Output LED Driver control 2.
A CLK signal An O signal An I signal A CS (Chip Select) signal The following features are available on the SPI bus : Master-only mode operation SPI speed is from 128 kbit/s to 26Mbit/s in master mode operation 4-wire interface 4 to 32 bits data length. Table21. SPI Inferface PADs Pin No. Name Direction Description 171 SPI_CLK Output SPI Serial Clock 186 SPI_MISO Input SPI Serial input 201 SPI_MOSI Output SPI Serial output 202 SPI_CS_N Output SPI Chip Select 2.
124 TDI Input Debugging 190 TMS Input Debugging 175 TCK Input Debugging 143 RTCK Output Debugging 174 TDO Output Debugging 206 JTAG_PS_HOLD Input Debugging 166 JTAG_RESIN_NN Input Debugging 113 VREG_MDME Output Power Supply JTAG (1.8V) 3. RF Specification The specifications for the LTE, GSM and WCDMA interfaces are defined. TM01LA-N is designed to be compliant with the standard shown in the table below. Table24.
Table25. Band WCDMA Band 2 Power Level WCDMA Band 4 Power Level WCDMA Band 5 Power Level Method (UL CH) Specification Measure Max and Min Transmit Power of Low Channel (CH=9263) in WCDMA B2 Mode Max Power : 20.2~24.2dBm Min Power : ≤ -50dBm Measure Max and Min Transmit Power of Middle Channel (CH=9400) in WCDMA B2 Mode Max Power : 20.2~24.2dBm Min Power : ≤ -50dBm Measure Max and Min Transmit Power of High Channel (CH=9537) in WCDMA B2 Mode Max Power : 20.2~24.
The Maximum / Minimum Transmitter Output Power of the TM01LA-N are specified in the following table. Table27.
sensitivity level(DUAL) Measure BLER of Mid Channel (2175) in Band4 Measure BLER of High Channel (2350) in Band4 BAND 5 Reference sensitivity level(DUAL) BAND 7 Reference sensitivity level(DUAL) BAND 17 Reference sensitivity level(DUAL) Measure BLER of Low Channel (2450) in Band5 Measure BLER of Mid Channel (2525) in Band5 Measure BLER of High Channel (2600) in Band5 Measure BLER of Low Channel (2800) in Band7 Measure BLER of Mid Channel (3100) in Band7 Measure BLER of High Channel (3400) in Band7 Meas
3.3.2 GSM RX Sensitivity The Receiver Sensitivity of the TM01LA-N are specified in the following table. Table30.
¨ □ User plane: v1/v2 trusted mode and OMA SUPL 2.0 assisted-GPS protocols ¨ □ Wideband processing of GPS signals helps resolve multipath interference, promoting improved measurement accuracy ■ Support for GLONASS standalone mode ¨ □ GLONASS capability increases the number of satellites available to the positioning engine, resulting in an expanded area of coverage over traditional GPS receivers 4.1 GNSS Characteristics The GNSS implementation supports GPS L1 operation and GLONASS L1 FDMA operation.
The electrical characteristics of the GNSS_LNA_EN signal are: Table36. GNSS_LNA EN Table Parameter GNSS_LNA_EN Output high level Output low level Min 1.6 0 Typ Max 1.9 0.
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FCC Part 15.19 Statements: This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. FCC Part 15.21 statement Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment.
l'exposition aux RF L’antenne (ou les antennes) doit être installée de façon à maintenir à tout instant une distance minimum de au moins 20 cm entre la source de radiation (l’antenne) et toute personne physique. Étiquetage du produit final Le module BT111 est étiqueté avec sa propre identification FCC et son propre numéro de certification IC.