User's Manual

LS5B User Manual

Libre Wireless Technologies User Manual: LS5B, Ver. 1.0 Page 72 of 89

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9. Introduction

Libre Wireless, LS5B-N11S is a module which includes a 580 MHz MIPS24K CPU core,

64MB of DDR2 DRAM memory and 16MB of Serial Flash, an 802.11n draft compliant 1T1R

MAC/BBP/PA/RF, single port 10/100 Ethernet MDI interface, and a USB Host.

The LS5B-N11S, has very few external components required for 2.4GHz 11n wireless

products. The LS5B-N11S employs Libre Wireless’s 2nd generation 11n technologies

longer range and better throughput. The embedded high performance CPU can process

advanced applications effortlessly, such as WIFI data processing without overloading the

host processor.

n addition, the LS5B-N11S has rich hardware interfaces (SPI/ I2S/ I2C/

UART/ USB) to enable many possible applications

10. Module Feature Summary

Key Features

1. LS5B-N11S is the small size and low power module for IEEE 802.11b/g/n

wireless LAN.

2. Embedded 1T1R 2.4G CMOS RF

3. Embedded 802.11n 1T1R MAC/BBP w/MLD enhancement

4. Support for both PCB connector and Notched SMT pad option

5. 150Mbps PHY data rate

6. 20Mhz/40Mhz channel width

7. Legacy and high throughout modes

8. Compressed block ACK

9. WEP64/128, WPA, WPA2, WAPI engines

10. QOS - WMM, WMM Power Save

11. Hardware frame aggregation

12. Supports 802.11h TPC

13. MIPS 24KEc 580 MHz with 64 KB I-cache/32 KB D-cache