Datasheet
LTC2302/LTC2306
20
23026fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008
LT 0908 REV A • PRINTED IN USA
TYPICAL APPLICATION
Clock Squaring/Level Shifting Circuit Allows Testing with RF Sine Generator,
Convert Re-Timing Flip-Flop Preserves Low Jitter Clock Timing
SDI
SDO
SCK
CONVST
SERIAL
PORT
ANALOG
INPUT
MUX
CH0 (IN
+
)
CH1 (IN
–
)
V
REF
CONVERT ENABLE
MASTER
CLOCK
RF SIGNAL
GENERATOR
OR OTHER LOW
JITTER SOURCE
V
CC
0.1µF
NC7SVU04P5X
LTC2302
LTC2306
V
DD
OV
DD
GND
MASTER
CLOCK
CONVERT
ENABLE
JITTER
0.1µF
12-BIT
500ksps
ADC
+
–
10µF0.1µF
1k
10µF 0.1µF
QD
PRE
V
CC
NL17SZ74
CONTROL
LOGIC
(FPGA, CPLD,
DSP, ETC.)
Q
CLR
1k
23026 TA02
50
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CONVST
DATA TRANSFER
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