Datasheet
7
2188f
LTC2188
power requireMenTs
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 9)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CMOS Output Modes: Full Data Rate and Double Data Rate
V
DD
Analog Supply Voltage (Note 10)
l
1.7 1.8 1.9 V
OV
DD
Output Supply Voltage (Note 10)
l
1.1 1.8 1.9 V
I
VDD
Analog Supply Current DC Input
Sine Wave Input
l
42
43
50 mA
mA
I
OVDD
Digital Supply Current Sine Wave Input, OV
DD
= 1.2V 1.6 mA
P
DISS
Power Dissipation DC Input
Sine Wave Input, OV
DD
= 1.2V
l
75.6
79.3
90 mW
mW
LVDS Output Mode
V
DD
Analog Supply Voltage (Note 10)
l
1.7 1.8 1.9 V
OV
DD
Output Supply Voltage (Note 10)
l
1.7 1.8 1.9 V
I
VDD
Analog Supply Current Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode
l
45
47
54
mA
mA
I
OVDD
Digital Supply Current
(0V
DD
= 1.8V)
Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode
l
38
74
83
mA
mA
P
DISS
Power Dissipation Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode
l
149
218
247
mW
mW
All Output Modes
P
SLEEP
Sleep Mode Power 1 mW
P
NAP
Nap Mode Power 10 mW
P
DIFFCLK
Power Increase with Differential Encode Mode Enabled
(No increase for Nap or Sleep Modes)
20 mW
TiMing characTerisTics
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
S
Sampling Frequency (Note 10)
l
1 20 MHz
t
L
ENC Low Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
l
20
2
25
25
500
500
ns
ns
t
H
ENC High Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
l
20
2
25
25
500
500
ns
ns
t
AP
Sample-and-Hold Acquisition Delay Time 0 ns
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Digital Data Outputs (CMOS Modes: Full Data Rate and Double Data Rate)
t
D
ENC to Data Delay C
L
= 5pF (Note 8)
l
1.1 1.7 3.1 ns
t
C
ENC to CLKOUT Delay C
L
= 5pF (Note 8)
l
1 1.4 2.6 ns
t
SKEW
DATA to CLKOUT Skew t
D
– t
C
(Note 8)
l
0 0.3 0.6 ns
Pipeline Latency Full Data Rate Mode
Double Data Rate Mode
6
6.5
Cycles
Cycles