Datasheet

15
LT1002
1002fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
IN
500
500
–
V–
V+
+
Q7
Q5
Q3
Q6
Q27
Q28
Q29
Q24
Q25
Q31
Q32
Q4
Q8
Q11
Q12
Q33
Q34
1002 SS
Q22
2k
2k
Q15
Q26
20
240
120
180Ω
20
3k
8k
1.5k
25k
Q16
Q21
Q23
Q13
Q14
55pF
20pF
3k
30pF
Q1B
Q10
Q9
Q19
Q20
T1
Q17
Q18
Q30
Q2B Q2A
IN
NULL NULL
40k40k
6k
6k
OUT
Q1A
1/2 LT1002
PACKAGE DESCRIPTION
U
SCHE ATIC DIAGRA
WW
J Package
14-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
OBSOLETE PACKAGE
J14 1298
0.045 – 0.065
(1.143 – 1.651)
0.100
(2.54)
BSC
0.014 – 0.026
(0.360 – 0.660)
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.125
(3.175)
MIN
0.300 BSC
(0.762 BSC)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
1
234
56
7
0.220 – 0.310
(5.588 – 7.874)
0.785
(19.939)
MAX
0.005
(0.127)
MIN
14
11 891013
12
0.025
(0.635)
RAD TYP
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS