Datasheet

8
LT1012A/LT1012
sn1012 1012afbs
Offset Voltage vs Source
Resistance (Balanced or
Unbalanced)
Typical Distribution of Input
Offset Current
Typical Distribution of Input Bias
Current
Input Bias Current vs
Temperature
Offset Voltage Drift vs Source
Resistance (Balanced or
Unbalanced)
Input Bias Current Over Common
Mode Range
Warm-Up Drift
Offset Voltage Drift with Temperature
of Four Representative Units
Long Term Stability of Four
Representative Units
SOURCE RESISTANCE (Ω)
1k
1
INPUT OFFSET VOLTAGE (µV)
100
1000
100k10k 300k 1M 3M 10M30k3k
10
LT1012A • TPC01
25°C
–55°C TO 125°C
V
S
= ±15V
INPUT BIAS CURRENT (pA)
NUMBER OF UNITS
120
160
200
LT1012A • TPC02
80
40
0
–120
–60
60 120
0
1020 UNITS
FROM THREE
RUNS
V
S
= ±15V
T
A
= 25°C
V
CM
= 0V
INPUT OFFSET CURRENT (pA)
NUMBER OF UNITS
120
160
200
LT1012A • TPC03
80
40
0
–120
–60
60 120
0
1020 UNITS
FROM THREE
RUNS
V
S
= ±15V
T
A
= 25°C
V
CM
= 0V
TEMPERATURE (°C)
–50
–150
INPUT BIAS CURRENT (pA)
–50
100
0
50
–100
50
0
100
–25 25
75
125
UNDERCANCELLED UNIT
LT1012A • TPC04
OVERCANCELLED
UNIT
SOURCE RESISTANCE (Ω)
1k
0.1
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)
10
100
100k10k 1M 10M 100M
1.0
LT1012 • TPC06
MAXIMUM
TYPICAL
0
0
CHANGE IN OFFSET VOLTAGE (µV)
3
4
5
4
2
1
1
2
3
5
TIME AFTER POWER ON (MINUTES)
METAL CAN (H) PACKAGE
DUAL-IN-LINE PACKAGE
PLASTIC (N) OR SO (S)
V
S
= ±15V
T
A
= 25°C
LT1012A • TPC07
TIME (MONTHS)
0
CHANGE IN OFFSET VOLTAGE (µV)
2
6
10
4
–2
–6
0
4
8
–4
–8
–10
1
2
3
5
LT1012A • TPC08
–50
OFFSET VOLTAGE (µV)
20
40
60
25 75
0
–20
–25 0
50 100 125
–40
–60
TEMPERATURE (°C)
LT1012A • TPC09
COMMON MODE INPUT VOLTAGE
–15
–60
INPUT BIAS CURRENT (pA)
–40
–20
0
20
60
–10
–5 0 5
10 15
40
V
S
= ±15V
T
A
= 25
o
C
DEVICE WITH POSITIVE
INPUT CURRENT
DEVICE WITH NEGATIVE
INPUT CURRENT
R
IN CM
= 2 X 10
12
Ω
+
–
LT1012A * TPC5
I
B
V
CM
TYPICAL PERFOR A CE CHARACTERISTICS
UW