Datasheet

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LT1224

Very High Speed

Operational Amplifier

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Unity-Gain Stable

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45MHz Gain-Bandwidth

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400V/µs Slew Rate

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7V/mV DC Gain: R

= 500Ω

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Maximum Input Offset Voltage: 2mV

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±12V Minimum Output Swing into 500Ω

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Wide Supply Range: ±2.5V to ±15V

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7mA Supply Current

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90ns Settling Time to 0.1%, 10V Step

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Drives All Capacitive Loads

ESCRIPTIO

The LT1224 is a very high speed operational amplifier with

excellent DC performance. The LT1224 features reduced

input offset voltage and higher DC gain than devices with

comparable bandwidth and slew rate. The circuit is a

single gain stage with outstanding settling characteristics.

The fast settling time makes the circuit an ideal choice for

data acquisition systems. The output is capable of driving

a 500Ω load to ±12V with ±15V supplies and a 150Ω load

to ±3V on ±5V supplies. The circuit is also capable of

driving large capacitive loads which makes it useful in

buffer or cable driver applications.

The LT1224 is a member of a family of fast, high per-

formance amplifiers that employ Linear Technology

Corporation’s advanced bipolar complementary

processing.

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Wideband Amplifiers

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Buffers

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Active Filters

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Video and RF Amplification

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Cable Drivers

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Data Acquisition Systems

ITY

DAC Current-to-Voltage Converter Inverter Pulse Response

LT1224 • TA01

–

DAC-08

TYPE

0.1µF 5k 1 LSB SETTLING = 140ns

OUT

7pF

LT1224

LT1224 • TA02

Summary of content (8 pages)

PAGE 1
LT1224 Very High Speed Operational Amplifier U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Unity-Gain Stable 45MHz Gain-Bandwidth 400V/µs Slew Rate 7V/mV DC Gain: RL = 500Ω Maximum Input Offset Voltage: 2mV ±12V Minimum Output Swing into 500Ω Wide Supply Range: ±2.5V to ±15V 7mA Supply Current 90ns Settling Time to 0.1%, 10V Step Drives All Capacitive Loads The LT1224 is a very high speed operational amplifier with excellent DC performance.
PAGE 2
LT1224 PACKAGE/ORDER I FOR ATIO U W W W Total Supply Voltage (V+ to V–) ............................... 36V Differential Input Voltage ......................................... ±6V Input Voltage ............................................................±VS Output Short Circuit Duration (Note 1) ............ Indefinite Operating Temperature Range LT1224C ................................................ 0°C to 70°C Maximum Junction Temperature Plastic Package ...........................................
PAGE 3
LT1224 ELECTRICAL CHARACTERISTICS VS = ±5V, TA = 25°C, RL = 1k, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage (Note 2) IOS Input Offset Current IB Input Bias Current MIN Input Voltage Range + TYP MAX 1 4 mV 100 400 nA 4 8 µA 2.5 UNITS 4 Input Voltage Range – V –3 – 2.5 V CMRR Common-Mode Rejection Ratio VCM = ±2.5V 86 98 dB AVOL Large-Signal Voltage Gain VOUT = ±2.5V, RL = 500Ω VOUT = ±2.5V, RL = 150Ω 2.
PAGE 4
LT1224 U W TYPICAL PERFOR A CE CHARACTERISTICS Input Common-Mode Range vs Supply Voltage 20 8.0 15 10 +VCM –VCM 5 0 7.5 7.0 6.5 5 10 15 0 20 5 SUPPLY VOLTAGE (±V) 10 15 15 10 VS = ±5V 0 100 1k 4.5 4.0 3.5 –5 –10 5 0 5 125 2 4.5 4.25 4.0 TEMPERATURE (°C) 3.5 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) LT1224 • TPC07 10k Output Short Circuit Current vs Temperature 55 3.
PAGE 5
LT1224 U W TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Rejection Ratio vs Frequency Input Noise Spectral Density in 1 100 en 10 10 100 1k 10k 120 VS = ±15V TA = 25°C 80 +PSRR 60 –PSRR 40 20 0 100 0.
PAGE 6
LT1224 U W U UO APPLICATI S I FOR ATIO The LT1224 may be inserted directly into HA2541, HA2544, AD847, EL2020 and LM6361 applications, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT1224 is shown below. overshoot in the unity-gain small-signal transient response. Higher noise gain configurations exhibit less overshoot as seen in the inverting gain of one response. Small Signal, AV = 1 Small Signal, AV = –1 Offset Nulling V+ 5k 1 3 + 0.
PAGE 7
LT1224 U W U UO APPLICATI S I FOR ATIO Capacitive Loading The LT1224 is stable with all capacitive loads. This is accomplished by sensing the load induced output pole and adding compensation at the amplifier gain node. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and in the transient response. The photo of the small-signal response with 1000pF load shows 50% peaking.
PAGE 8
LT1224 W W SI PLIFIED SCHE ATIC V+ 7 NULL 1 8 BIAS 1 +IN 3 BIAS 2 2 –IN 6 V– OUT 4 LT1224 • TA10 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead Plastic DIP 0.300 – 0.320 (7.620 – 8.128) 0.065 (1.651) TYP 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 8 0.009 - 0.015 (0.229 - 0.381) +0.025 0.325 –0.015 ( +0.635 8.255 –0.381 0.125 (3.175) MIN 0.045 ± 0.015 (1.143 ± 0.381) ) 0.400 (10.160) MAX 0.100 ± 0.010 (2.540 ± 0.